//Flash Instantiations
reg [15:0] wdata;
reg writemode;
reg dowrite;
reg [22:0] raddr; // address of where we want to read from flash (playing from flash)
wire [15:0] frdata;     //data being read
reg doread; // tell flash to read from memory
wire busy; // flash is busy, don't read/write when asserted
wire [11:0] fsmstate; //for intense debugging. you mostly likely will not need.
wire dots; //FOR EXTREME DEBUGGING. You shouldn't need to look at these. If you do, email me.
wire writing;
wire reading;
reg [4:0] flashcounter=0;
assign writing = switch[7];
assign reading = switch[6];

//USB and FIFO Instantiations
wire [7:0] datausbout;
wire newout;
reg hold;
reg firstone=1;
reg [7:0]firstbyte;
reg [15:0]datatofifo;
reg wr_en_fifo=0;
reg rd_en_fifo=0;
wire[15:0] dout_fifo;
wire full;

usb_input usb_input(clock_27mhz,reset,user4[7:0],user4[8],user4[9],datausbout,newout,hold,state);
flashfifo flashfifo(clock_27mhz, datatofifo,rd_en_fifo,reset,wr_en_fifo,dout_fifo,empty,full);

always @(posedge clock_27mhz) begin
    if(full) hold<=1;
    else hold<=0;
    
    if (firstone&&newout) begin
        firstbyte<=datausbout;
        firstone<=0; 
     end
    if ((!firstone)&&newout) begin
        datatofifo<={firstbyte[7:0],datausbout[7:0]};
        wr_en_fifo<=1;
        firstone<=1;
        end
    if (!((!firstone)&&newout)) wr_en_fifo<=0;
    end


always @(posedge clock_27mhz) begin
    if (up) begin
        writemode <=1; 
        dowrite <= 0; 
        doread <= 0;
        wdata <= 0; // initial write data = 0
        raddr <= 0; // initial read address = 0
        end
    else begin
        if(busy==0) begin
            if(writing) begin
                if(!empty) begin//when fifo has no info, dont do anything. just wait
                    writemode<=1;
                    doread<=0; 
                    rd_en_fifo<=0;
                    flashcounter<=1+flashcounter;//2^5 clock cycles between write
                    if (flashcounter==0) begin
                        rd_en_fifo<=1;
                        dowrite<=1;
                        wdata<=dout_fifo;
                    end
                end
            end
            if(reading) begin
                writemode<=0;
                doread<=1;
           raddr<=0;//ADDRESS YOU WANT  
                end
            end
        else begin //busy
            if (writing)begin
                dowrite<=0; 
                flashcounter<=1;
                end
        else begin
           doread<=0;
        end
        end
    end
end

assign led = ~{writing,reading,busy,writemode,doread,dowrite,empty,switch[0]};
wire [63:0] data_in_display; 
assign data_in_display= {9'd0,raddr[22:0],frdata,datatofifo};
display_16hex display_16hex (power_on_reset, clock_27mhz, data_in_display, 
    disp_blank, disp_clock, disp_rs, disp_ce_b,
    disp_reset_b, disp_data_out);

flash_manager flash(.clock(clock_27mhz), .reset(switch[4]), .dots(dots), .writemode(writemode), .wdata(wdata), 
                  .dowrite(dowrite), .raddr(raddr), .frdata(frdata), .doread(doread), .busy(busy), 
                  .flash_data(flash_data), .flash_address(flash_address), .flash_ce_b(flash_ce_b), 
                  .flash_oe_b(flash_oe_b), .flash_we_b(flash_we_b), .flash_reset_b(flash_reset_b), 
                  .flash_sts(flash_sts), .flash_byte_b(flash_byte_b), .fsmstate(fsmstate));