| Week of |
Tue |
Thu |
| Sep 02 |
Registration Day |
L01: Course overview. Digital abstraction, static discipline, logic families
|
| Sep 09 |
L02: Combinational logic, canonical representations, simplification and synthesis
|
L03: Verilog hardware description languge. FPGA architectures
|
| Sep 16 |
L04: Sequential building blocks, state and feedback, registers
|
L05: Finite state machines, Verilog implementation examples
|
| Sep 23 |
L06: Case study: video circuits
|
L07: System Integration, Clocking, number encoding
|
| Sep 30 |
L08: Arithmetic circuits, adder, multipliers
|
L09: Behavioral transformations, FPGA
|
| Oct 07 |
L10: Analog building blocks (op-amps, DACs, ADCs), sampling, reconstruction, filtering
|
L11: Project kickoff; proposals and presentations
|
| Oct 15 |
Student Holiday |
L12: Memories: on-chip, SRAM, DRAM, Flash
|
| Oct 21 |
L13: Communications
|
L14: Image Processing - Let's go to Fenway!
|
| Oct 29 |
L15: VLSI and power
|
Project Block Diagram Meeting
by 11/01 (Fri) by 5pm
|
| Nov 04 |
Project Design Presentations
(2:30-5PM room TBD) - attendance required
|
Project Design Presentations
(2:30-5PM room TBD) - attendance required
|
| Nov 11 |
|
Project Checklist Meeting with Staff |
Revised Project Proposals (if necessary)
due 11/15 (Fri) by 5pm |
|
Final project
Project Checklist Meeting with Staff by 11/15 (Fri) by 5pm
|
| Nov 18 |
Final project integrtion and debugging!
Next week is a short week!
|
| Nov 25 |
Final project
Short week |
Thanksgiving |
| Dec 02 |
|
Final project - finishing touches! |
|
Final project - polishing!
|
| Dec 09 |
Project Checkoff/Video recording Mon/Tue
|
Wed project Report due 12/11@ 5PM (Wed)
|