6.111 Handouts
| Lectures |
- L01: Digital Abstraction, 9/09/10 [PDF]
- L02: Logic Synthesis, 9/14/10 [PDF]
- L03: Verilog, 9/16/10 [PDF]
- L04: Sequential Logic, 9/21/10 [PDF]
- L05: Finite State Machines, 9/23/10 [PDF]
- L06: System Integration Issues, 9/28/10 [PDF]
- CI-M slides (2009) [PDF]
- CI-M slides (2010) [PDF]
- CI-M Rubric (2010) [PDF]
- Lecture PSet #6 [PDF]
- L07: Memories, 9/30/10 [PDF]
- L08: Arithmetic Circuits, 10/5/10 [PDF]
- L09: Multiplier & Pipelining, 10/7/10 [PDF]
- L10: Analog Building Blocks, 10/14/10 [PDF]
- L11: Final Project, 10/19/10 [PDF]
- L12: Video, 10/21/10 [PDF]
- L13: Datapaths, 10/26/10 [PDF]
- L14: Potpourri, 10/28/10 [PDF]
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| Labs |
- Lab #1, checkoff deadlines: 9/16 and 9/17 (see check-off lists)
[HTML],
Lab 1 Report Template [PDF]
- Lab #2, checkoff deadlines: 9/23 and 9/24 (see check-off lists)
[HTML]
- Lab #3,[HTML], checkoff deadlines:
- Part I (state diagrams and timer code) 9/30 and 10/1,
- Part II (the rest of the lab) 10/7 and 10/8
- Lab #4, checkoff deadline: 10/22/10
- Lab #4a - Voice Recorder [HTML]
- Lab #4b - IR Remote Control [HTML]
- Lab #5, checkoff deadline: 10/29/10 [HTML]
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Final
Project |
- Information and Schedule [HTML]
- How to Make your 6.111 Project Work [HTML]
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| Info | |
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Data
sheets |
- Texas Instruments Digital Logic Pocket Data Book [PDF]
- Pin Assignment Diagrams [PDF]
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