Week of December 11, 2017

  • This week's to-do list:
    • Mon
      • The Final Project Checkoff has been posted. Since it's a tight schedule please make every effort to be on time!
      • Please upload the Final Project video release pdf under "Submit PDF" to allow us to post the video on the course website. A release form is required from each team member. Video recording is optional. However, it's a great reference for future employers and an opportunity to showcase your engineering skills.
    • Tue 2:30-4pm: Clean out your tool kit and check in with staff. This is mandatory! Kits not checked in will receive an incomplete grade.
    • Wed
      • All benches must be clear by Wed 5pm. Let me know if you wish to keep your setup for a few days to show your project to your friends. Many projects are just awesome. We can accommodate you.
      • Your project report is due by MIT rules at 5PM on Wed 12/13. However, we won't start reading the reports until Friday Monday at 10AM so you have until then. Include as an appendix your Verilog source files. Your written report grade is worth 5% of your total grade. (Length is not a factor in the report grade.) This is how the points will be distributed:
        • Technical content - overview/motivation: 0, 0.5, 1
        • Logical, readable diagrams and timing (if appropriate) 0, 0.5, 1
        • Enough details so the project can be replicated by a fellow student 0, 0.5, 1
        • Discussion on tricky circuits/challenges/measurements of interesting signals (if appropriate) 0, 0.5, 1
        • Lessons learned, advice for the future projects, 0, 0.5, 1
      • Upload your project in ONE ZIP file under "Submit Verilog". Include only the Verilog and XDC (if modified) files. This will future projects to reuse your Verilog.
    • Important: Please take a moment to fill out the MIT Course Evaluations for 6.111. We'd very much like to get your comments on the course! This feedback will help us a lot in shaping-up the class. By now you're all experts in 6.111 so let your voice be heard!

See Announcements to read previous messages; see EECS Instructional Labs for open lab hours.