Preliminary Course Schedule (updated 2/28/05)

Monday
Wednesday
Friday
January 31

Reg Day
 		 February 2

L1: Introduction

Course objectives, digital logic, hardware description languages
Lab 1 handed out
Problem Set 1 handed out
Logic Analyzer Demos in the 6.111 lab by TAs, February 3-4 (this replaces recitation in the first week)

February 4

L2: Combinational Logic

Logic gates, Boolean algebra, visualizations of Boolean algebra, hazards

Logic Analyzer Demos in the 6.111 lab by TAs, February 3-4 (this replaces recitation in the first week)

February 7

L3: Introduction to Verilog (Combinational Logic)

Logic synthesis, the Verilog hardware description language, combinational logic in Verilog, testbenches

 

February 9

Recitation on Wednesday just for this week during the lecture hour (1-2PM) in the following rooms:

R01: 34-304
R02: 36-153
R03: 36-372

February 11

L4: Sequential Building Blocks

Preserving state with feedback, latches and flip-flops, clocks and timing constraints, clock skew

WARP, MAX+plus II, and ModelSim Demo in the 6.111 lab by TAs, February 10-11
Jenny - 2/10, 4-5 PM
Chris - 2/11, 2-3 PM
Charlie - 2/11, 3-4 PM

February 14

L5: Simple Sequential Circuits and Verilog

Simple counters, Verilog implementation of Sequential Circuits

Problem set 1 due in lecture
Problem set 2 handed out

February 16

L6: Finite-State Machines and Synchronization

Metastability and synchronization, Mealy and Moore formalisms, Verilog implementations, FSM examples

February 18

Recitation (36-144, 34-304, 36-155)

Lab 2 Discussion and Demonstration

Lab 2 handed out in recitation

 

February 21 - No Class
Lab 1 Checkoff and Report Due in 38-107 by Feb 21, Noon

Moday Schedule of Classes Held on 2/22 (Tuesday)

February 22 (TUESDAY)
L7: Memory Basics and Timing

Technologies, types of RAM and ROM, memory controller circuits, specialty memories, high-performance interfaces

 February 23

L8: Arithmetic Structures

Binary addition and subtraction, implementation and performance of the full adder, high-speed addition, signed arithmetic

February 25

Recitation (36-144, 34-304, 36-155)

Problem set 2 due in recitation
Problem set 3 handed out

February 28

L9: Arithmetic Structures (cont.)

Binary addition and subtraction, implementation and performance of the full adder, high-speed addition, signed arithmetic

CI-M requirements (Lab2 report guidelines) - Atissa Banuazizi

March 2

Finish Arithmetic Structures

L10: Analog Building Blocks

Analog inputs, useful op-amp circuits, A/D and D/A conversion, useful A/D and D/A circuits

Lab2a (Traffic Light FSM) Checkoff		 March 4

Recitation (36-144, 34-304, 36-155)


  
March 7

Finish Analog Building Blocks

L11: System Integration Issues and Major/Minor FSM

Hierarchy and modularity, data and control paths, major and minor FSMs, memory modules (RAM/ROM) in Altera, design tips. Lab 3 Overview.

Lab 2b (Memory Tester) Checkoff

March 9

L12: Reconfigurable Logic Architecture

Overview of commercial devices, programmable logic (PAL), FPGA Architectures, and software tools

Lab 2 Report Due by 11AM in 38-107
Lab 3 handed out

March 11
Recitation (36-144, 34-304, 36-155)

Quiz Review

Problem set 3 due in recitation 

March 14


6.111 Quiz

Location: Walker Gym (50-340)

 

March 16

L13: Project Kickoff

Video of past 6.111 projects, project ideas, deadlines and goals, project guidelines, grading, asynchronous interfaces and kit-to-kit communication


March 18

Recitation (36-144, 34-304, 36-155)

Will go over the Quiz.

Lab 3 Intermediate Check Off
March 21-25

Spring Break

March 28

L14: Video

Lecture by Prof. Troxel

(Motor lecture available on the website)

Formation of Project Teams

March 30

L15: VLSI Integration and Performance Transformations

Moore's Law, VLSI integration, layout and fabrication, application-specific circuits, microprocessors. Behavioral and algorithmic transformations, retiming, parallelism and pipelining

April 1

NO MORE RECITATIONS

Lab 3 Check Off

April 4

L16: Power Dissipation in Digital Systems

Heat and battery life issues, sources of power dissipation,  circuit and algorithm optimizations for power, voltage scaling

Project Abstracts Due (in class)
Lab 3 Report Due (in class)

April 6

NO MORE LECTURES OR RECITATIONS


Proposal Conference with TAs
(April 6-8). Bring Project Proposals for the Proposal Conference

April 8

NO MORE LECTURES OR RECITATIONS

Lab 2 revised report due (part of CIM)
Proposal Conference with TAs (April 6-8). Bring Project Proposals for the Proposal Conference

April 11

Block Diagram Conference With TAs

No Lecture

April 13

Block Diagram Conference With TAs

No Lecture

April 15

 Block Diagram Conference With TAs

No Lecture

April 18

Patriots Day - Vacation

April 20

Project Design Presentation in 34-101

Customized Project Checklist Due

HKN Review

April 22

Project Design Presentation in 34-101

April 25

Project Design Presentation in 34-101

April 27

Project Design Presentation in 34-101

April 29

 Implement/Debug

May 2

Implement/Debug

No Lecture

May 4

Implement/Debug

Guest Lecture by K. Kowal on PCB Design and Signal Integrity

May 6

Implement/Debug

No Lecture

May 9

Implement/Debug

May 10/11 (Tu/W)

Final Project Demonstrations and Video Taping

Final Project Report Due by 5PM on May 12 (Thursday)

May 13