MIT 6.111 (Spring 2006):
Introductory Digital Systems Laboratory

Course Description: Lectures and labs on digital logic, sequential building blocks, finite-state machines, timing and synchronization, and FPGA-based design prepare students for the design and implementation of a final project of their choice: games, music, digital filters, wireless communications, video, or graphics. Extensive use of Verilog for describing and implementing digital logic designs on a state-of-the-art FPGA. Students engage in extensive written and oral communication exercises. 12 Engineering Design Points. Prereq: 6.002 or 6.071 Units: 3-7-2

Lecture: MWF1 (34-101), Recitations: F1 (R1: 36-144, R2: 34-304, R3: 36-155); Either lecture or recitations will be held on Fridays at 1PM
Lecturer: Anantha Chandrakasan (, ph: 8-7619, office hours in 38-107, M:2-3PM and W: 11-12AM or by appointment)
TAs: Javier Castro (, Theodoros Konstantakopoulos (, Kyeong-Jae Lee ( -- ph: 3-7350, 38-684
LAs: Christopher Falling (, Amir Hirsch (, James J. Wnorowski (, Yun Wu (

Recitation Assignments  (requires MIT CA certificate)
Schedules of Lecturer, Teaching Assistants, and Lab Aides


Class Schedule and Lecture Slides

General Handouts

FPGA Lab Kit and Tutorials


Problem Sets and Solutions

Lab Hours

Final Project Information

Final Projects (Including Final Project Videos!)

Tutorial Services (HKN)     Tutorial Services (TSR)
Stressed out? - call Nightline (3-8800) or the Dean on-call (3-1212)
6.111 Hotline Send electronic mail to
Technical Instructor: Gim P. Hom (38-644, 4-3373, gim@MIT.EDU)
EMERGENCY - DIAL 100 Emergency and Service numbers

Last updated February 1, 2006 by Anantha P. Chandrakasan,
Copyright 2006 by Massachusetts Institute of Technology. All rights reserved.