Course Description: Lectures and labs on digital logic, sequential building blocks, finite-state machines, timing and synchronization, and FPGA-based design prepare students for the design and implementation of a final project of their choice: games, music, digital filters, wireless communications, video, or graphics. Extensive use of Verilog for describing and implementing digital logic designs on a state-of-the-art FPGA. Students engage in extensive written and oral communication exercises. 12 Engineering Design Points. Prereq: 6.002 or 6.071 Units: 3-7-2

Lecture: MWF1 (34-101), Recitations: F1 (R1: 36-144, R2: 34-304, R3: 36-155); Either lecture or recitations will be held on Fridays at 1PM
Lecturer: Anantha Chandrakasan (anantha@mtl.mit.edu, ph: 8-7619, office hours in 38-107, M:2-3PM and W: 11-12AM or by appointment)
TAs: Javier Castro (javy@mit.edu), Theodoros Konstantakopoulos (tkonsta@mit.edu), Kyeong-Jae Lee (kjaelee@mit.edu) -- ph: 3-7350, 38-684
LAs: Christopher Falling (c.l.falling@verizon.net), Amir Hirsch (amirh@mit.edu), James J. Wnorowski (jamwno@mit.edu), Yun Wu (yunw@mit.edu)

Recitation Assignments  (requires MIT CA certificate)
Schedules of Lecturer, Teaching Assistants, and Lab Aides