MIT
6.111 (Spring 2007): |
Course Description: Lectures and labs on digital logic, sequential building blocks, finite-state machines, timing and synchronization, and FPGA-based design prepare students for the design and implementation of a final project of their choice: games, music, digital filters, wireless communications, video, or graphics. Extensive use of Verilog for describing and implementing digital logic designs on a state-of-the-art FPGA. Students engage in extensive written and oral communication exercises. 12 Engineering Design Points. Prereq: 6.002 or 6.071 Units: 3-7-2
Lecture: MWF1 (34-101), Recitations:
F1 (R1: 34-303,
R2: 34-304, R3:
36-144); Either
lecture or recitations will be held on Fridays at 1PM
Lecturers: Anantha
Chandrakasan (anantha@mtl.mit.edu, 38-107, 8-7619) and Akintunde (Tayo)
Akinwande (akinwand@mtl.mit.edu, 39-553, 8-7974)
TAs: Javier Castro (javy@mit.edu),
Amir Hirsch(amirh@mit.edu), David Wentzloff (ddw@mit.edu) -- ph: 3-7350,
38-684
Technical Instructor: Gim P. Hom
(38-644, 4-3373, gim@MIT.EDU)
LAs: Wendi Li (wendili@mit.edu), Alex Valys (avalys@mit.edu),
Zhongying Zhou (zy3@mit.edu)
Recitation Assignments (requires
MIT CA certificate)
Schedules
of Lecturer, Teaching Assistants, and Lab Assistants
Class Schedule and Lecture Slides
Final Projects (with Videos!)