MIT 6.111 (Spring 2008):
Introductory Digital Systems Laboratory


Announcements:


Course Description: Lectures and labs on digital logic, sequential building blocks, finite-state machines, timing and synchronization, and FPGA-based design prepare students for the design and implementation of a final project of their choice: games, music, digital filters, wireless communications, video, or graphics. Extensive use of Verilog for describing and implementing digital logic designs on a state-of-the-art FPGA. Students engage in extensive written and oral communication exercises. 12 Engineering Design Points. Prereq: 6.002 or 6.071 Units: 3-7-2

Lecture: MWF1 (32-144), Recitations: F1 (R1: 34-303, R2: 34-304, R3: 36-112); Either lecture or recitations will be held on Fridays at 1PM
Lecturer: Akintunde (Tayo) Akinwande (akinwand AT mtl.mit.edu, 39-553, 8-7974)
TAs: Imran Shamim (imrans AT mit.edu), Irene Zhang (iyzhang AT mit.edu) -- ph: 3-7350, 38-684
Technical Instructor: Gim P. Hom (gim AT mit.edu, 38-644, 4-3373)
LAs: Jess Barber (jessb AT mit.edu), Chun Li (chunli AT mit.edu), Andrew Meyer (ajmeyer AT mit.edu), Ceryen Tan (ctan AT mit.edu), Edgar Twigg (bwayr AT mit.edu)

Recitation Assignments  (requires MIT CA certificate)
Schedules of Lecturer, Teaching Assistants, and Lab Assistants


Links

Class Schedule and Lecture Slides

General Handouts

FPGA Lab Kit and Tutorials

Labs

Problem Sets and Solutions

Lab Hours


Resources
Tutorial Services (HKN)     Tutorial Services (TSR)
Stressed out? - call Nightline (3-8800) or the Dean on-call (3-1212)
6.111 Hotline Send electronic mail to 6.111-st08-staff AT mit.edu
EMERGENCY - DIAL 100 Emergency and Service numbers

Last updated February 5, 2007 by Irene Zhang
Copyright 2008 by Massachusetts Institute of Technology. All rights reserved.