MIT 6.111 (Spring 2009):
Introductory Digital Systems Laboratory


Announcements:


Course Description: Lectures and labs on digital logic, sequential building blocks, finite-state machines, timing and synchronization, and FPGA-based design prepare students for the design and implementation of a final project of their choice: games, music, digital filters, wireless communications, video, or graphics. Extensive use of Verilog for describing and implementing digital logic designs on a state-of-the-art FPGA. Students engage in extensive written and oral communication exercises. 12 Engineering Design Points. Prereq: 6.002, 6.071, or 16.004 Units: 3-7-2

Lecture: MWF1 (MW: 32-144, F: 32-141) Recitations: F1 (Rec1: 36-112, Rec2: 36-144 ; Either lecture or recitations will be held on Fridays at 1PM
Lecturer: Akintunde (Tayo) Akinwande (akinwand AT mtl.mit.edu, 39-553, 8-7974)
Writing Program Lecturers: Don Unger (donunger AT mit.edu), Mary Caulfield (mcaulf AT mit.edu), Ben Miller (bjmiller AT mit.edu)
TAs: Christopher Celio (celio AT mit.edu), Adam Lerer (alerer AT mit.edu)
Technical Instructor: Gim P. Hom (gim AT mit.edu, 38-644, 4-3373)
LAs: Lance Collins (ljcol25 at mit.edu), Sam Gross (sgross AT mit.edu)

Recitation Assignments  (requires MIT CA certificate)
Schedules of Lecturer, Teaching Assistants, and Lab Assistants


Links

Class Schedule and Lecture Slides

General Handouts

FPGA Lab Kit and Tutorials

Labs

Problem Sets and Solutions

Lab Hours

Final Project Videos


Resources
Tutorial Services (HKN)     Tutorial Services (TSR)
Stressed out? - call Nightline (3-8800) or the Dean on-call (3-1212)
6.111 Hotline Send electronic mail to 6.111-st09-staff AT mit.edu
EMERGENCY - DIAL 100 Emergency and Service numbers

Last updated Feb 28, 2009 by Christopher Celio
Copyright 2009 by Massachusetts Institute of Technology. All rights reserved.