.include "m1281def.inc"

.org 0
rjmp start
.org int4addr
rjmp wakeupshit15
.org int5addr
rjmp clearirq
.org OVF2addr
rjmp wakeup
.org ADCCaddr
rjmp wakeup

; reset = pe1
; buttons = pe6,pe7
; accelerometer = pf0(adc0),pe3(ain1)
; shit15 data = pe4(int4)
; shit15 clock = pe0
; vref to pe2(ain0)

start: ; configure microcontroller registers

; using internal 8MHz RC oscillator
; system clock set to 1MHZ by /8 prescaler in fuse bits
ldi r16,high(RAMEND)
out SPH,r16 ; Set Stack Pointer to top of RAM
ldi r16,low(RAMEND)
out SPL,r16
ldi r16,$17
out ddrb,r16 ; set ss,sclk,mosi,slp_tr as output
ldi r16,8
out portb,r16 ; enable pullup for miso
ldi r16,1
out spsr,r16 ; set up spi
ldi r16,$50
out spcr,r16 ; set up spi
sbi portb,portb0 ; set ss pin high
cbi portb,portb4 ; set slp_tr low
sbi ddra,dda7 ; set reset pin as output
sbi porta,porta7 ; pull reset high on rf unit
ldi r16,$0c
sts eicrb,r16 ; configure int5 for rising edge
ldi r16,$20
out eimsk,r16 ; enable int5
;sbi porte,porte6 ; turn on pullup for button1
;sbi porte,porte7 ; turn on pullup for button2

;setup power reduction registers
;ldi r16,$ab
;sts prr0,r16 ; turn off adc,usart0,t1,t0,twi
;ldi r16,$3f
;sts prr1,r16 ; turn off t5,t5,t3,usart3,usart2,usart1
;ldi r16,$90
;out acsr,r16 ; turn off comparator

;setup analog inputs
;ldi r16,$01
;sts didr0,r16 ; turn off input stage for adc0 pin
;ldi r16,$03
;sts didr1,r16 ; turn off input stage for ain0,ain1 pins

;setup t2 as rtc at 8s interval wakeup
ldi r16,$20
sts assr,r16 ; set t2 to assynchronous mode
ldi r16,$05
sts tccr2b,r16 ; set t2 prescaler to /128 - 1s wakeup period

;make sure t2 is done rewriting itself
checkassr:

lds r16,assr
andi r16,$1f ; check assr(4:0) clear
brne checkassr

clr r16
sts tifr2,r16 ; clear all pending interrupts
ldi r16,$01
sts timsk2,r16 ; enable t2 overflow interrupt

;setup shit15 - pe0 is data, pe4 is clock
;sbi ddre,dde0 ; set clock as output
;cbi porte,porte4 ; make sure pullups are off for data
;rcall shit15setup

;configure rf unit registers

;wait
ldi r20,$80 ; load the wait timer to 128 cycles (x10/ck)
rcall wait2 ; wait ~(1280/1MHz = 1.2ms) for rf unit to stabilize

;go to trx_off state
rcall txoff ; go to trx_off state on rf unit

;setup clkm
ldi r16,$c3 ; load first data byte - write trx_ctrl_0 register
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send data
clr r16 ; load second data byte - turn off clkm
rcall spiwrite ; send data
sbi portb,portb0 ; pull ss high

;setup short_addr_0
ldi r16,$e0 ; load first data byte - write short_addr_0 register
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send data
ldi r16,$bb ; load second data byte - $aa
rcall spiwrite ; send data
sbi portb,portb0 ; pull ss high

;setup short_addr_1
ldi r16,$e1 ; load first data byte - write short_addr_1 register
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send data
ldi r16,$bb ; load second data byte - $aa
rcall spiwrite ; send data
sbi portb,portb0 ; pull ss high

;setup pan_id_0
ldi r16,$e2 ; load first data byte - write pan_id_0 register
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send data
ldi r16,$aa ; load second data byte - $aa
rcall spiwrite ; send data
sbi portb,portb0 ; pull ss high

;setup pan_id_1
ldi r16,$e3 ; load first data byte - write pan_id_1 register
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send data
ldi r16,$cc ; load second data byte - $cc
rcall spiwrite ; send data
sbi portb,portb0 ; pull ss high

;setup phy_tx_pwr - turn crc on
ldi r16,$c5 ; load first data byte - write phy_tx_pwr register
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send data
ldi r16,$80 ; load second data byte - auto_crc=on,pwr=+3dbm
rcall spiwrite ; send data
sbi portb,portb0 ; pull ss high

;setup csma_seed_1
ldi r16,$ee ; load first data byte - write csma_seed_1 register
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send data
ldi r16,$05 ; load second data byte - min_be=0,aack_set=0,i_am_coord=0,csma(10:8)=101
rcall spiwrite ; send data
sbi portb,portb0 ; pull ss high

;clear pending irqs on rf unit 
ldi r16,$8f ; load first data byte - read register irq_status command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte and clear pending irqs
sbi portb,portb0 ; pull ss high

;enable irqs on rf unit
ldi r16,$ce ; load first data byte - write register irq_mask command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$08 ; load second data byte - trx_end only
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high

;clear pending irqs on micro
clr r16
out eifr,r16 ; clear any interrupt flags that are set

;enable interrupts on micro
sei ; turn on interrupts

;enter sleep mode on rf unit
sbi portb,portb4 ; pull slp_tr high to enter sleep mode
ldi r20,$80 ; load the wait timer to 128 cycles (x10/ck)
rcall wait2 ; wait ~(1280/1MHz = 1.2ms) to make sure were in sleep

repeat: ; transmit data from sleep mode
;ldi r19,$0f ; sample n times - 4ms

adcsample: ; take measurement from adc0
;ldi r16,$aa
;sts prr0,r16 ; turn on adc, leave off usart0,t1,t0,twi
;ldi r16,$c0
;sts admux,r16 ; use internal 2.56v as voltage reference,sample adc0
;ldi r16,$9c
;sts adcsra,r16 ; turn on adc,clear interrupt flag,enable interrupt,set to /16
;ldi r16,$03
;out smcr,r16 ; setup adc noise reduction mode
;nop
;nop
;nop
;sleep ; wait till converesion is done
;nop
;nop
;nop
;clr r16
;out smcr,r16 ; disable sleep modes
;lds r28,adcl ; load low bit to r28
;lds r29,adch ; load high bit to r29
;dec r19
;brne adcsample ; take n samples to let vref settle

;cbi portf,portf3

;reset accelerometer
;ldi r16,$10
;out acsr,r16 ; turn on comparator
;nop ; delay to let things settle a bit
;nop
;nop
;nop
;nop
;nop
;nop
;nop
;nop
;nop
;nop
;in r16,acsr ; check comparator output
;sbrs r16,5 ; dont bother resetting if already high
;rjmp compdone
;cbi porte,porte1 ; set reset pin to low
;sbi ddre,dde1 ; set reset pin to output

;compwait: ; idle until ain1 > ain0

;in r16,acsr
;sbrc r16,5
;rjmp compwait ; keep checking comparator output for low output
;cbi ddre,dde1 ; turn off the resetting function

;compdone: ; resetting done

;ldi r16,$90
;out acsr,r16 ; turn off comparator
;ldi r16,$00
;sts adcsra,r16 ; turn off adc
;ldi r16,$ab
;sts prr0,r16 ; turn off adc,usart0,t1,t0,twi

;rcall shit15temp ; read shit15 temperature

;rcall shit15humidity ; read shit15 humidity

cbi portb,portb4 ; pull slp_tr low to exit sleep mode
ldi r20,$28 ; load wait timer to 40 cycles (x10/ck)
rcall wait2 ; wait ~(400/1MHZ = 400us) for rf unit clock to stabilize

rcall checktxoff ; check to see if rf unit is in tx_off state

rcall txonaret ; put the rf unit in tx_aret_on state

rcall transmitbeacon ; transmit packet with adc values and shit15 data

;wait till transmission is complete - could be replaced with a sleep
set ; set the t register as a signal that were waiting
waitdone:
nop
nop
nop
brts waitdone ; check if its been cleared by the interrupt

sleepstate:

ldi r16,$07
out smcr,r16 ; set to power-save mode and enable sleep mode
ldi r29,$3c ; set up repeat timer to 60cycles - 1min
nop
nop
nop

sleepstate1:
sleep
nop
nop
nop
;mov r25,r24 ; move last current button press to previous button press
;in r24,pine ; read button state
;ser r16
;eor r24,r16 ; flip state of buttons because they are currently pulled up
;andi r24,$c0 ; mask off the two buttons of interest
;and r25,r24 ; check if button was pressed last time
;breq sleepstate2 ; do nothing if button was not pressed last time and this time
;mov r16,r26
;and r16,r25 ; check if already sent that button press in past minute
;brne sleepstate2 ; dont send data if already sent it
;or r26,r25 ; mask off button wait register
;rjmp repeat ; take measurements and send them off - r25

sleepstate2:
dec r29
brne sleepstate1 ; return to sleep if not yet 1min
clr r16
out smcr,r16 ; disable sleep mode
;mov r26,r25 ; reset button wait register
rjmp repeat ; take measurements and send them off

txoff: ; send trx_off command to rf unit and wait till stable

ldi r16,$c2 ; load first data byte - write register trx_state command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$08 ; load second data byte - data trx_off bit
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high

checktxoff: ; check current state to see if in tx_off state

ldi r16,$81 ; load first data byte - read register trx_status command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$00 ; load second data byte - blank for reading
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high
cpi r16,$08
brne checktxoff
ret ; return to previous duty

forcetxoff: ; send trx_off command to rf unit and wait till stable

ldi r16,$c2 ; load first data byte - write register trx_state command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$03 ; load second data byte - data force_trx_off bit
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high

checkforcetxoff: ; check current state to see if in tx_off state

ldi r16,$81 ; load first data byte - read register trx_status command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$00 ; load second data byte - blank for reading
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high
cpi r16,$08
brne checkforcetxoff
ret ; return to previous duty

pllon: ; send pll_on command to rf unit

ldi r16,$c2 ; load first data byte - write register trx_state command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$09 ; load second data byte - data pll_on bit
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high

checkpllon: ; check current state to see if in pll_on state

ldi r16,$81 ; load first data byte - read register trx_status command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$00 ; load second data byte - blank for reading
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high
cpi r16,$09
brne checkpllon
ret ; return to previous duty

txonaret: ; send trx_aret_on command to rf unit and wait till stable

ldi r16,$c2 ; load first data byte - write register trx_state command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$19 ; load second data byte - data trx_aret_on bit
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high

checktxonaret: ; check current state to see if in tx_aret_on state

ldi r16,$81 ; load first data byte - read register trx_status command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$00 ; load second data byte - blank for reading
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high
cpi r16,$19
brne checktxonaret
ret ; return to previous duty

transmit: ; transmit a packet

sbi portb,portb4 ; pull slp_tr high to begin transmit
nop ; delay to make sure the pin is high long enough
cbi portb,portb4 ; pull slp_tr low

ldi r16,$60 ; load data byte - write buffer command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$13 ; load frame length byte - total bytes excluding this one, +2
rcall spiwrite ; send byte
ldi r16,$61 ; load fcf(7:0) byte - $61 for data packet
rcall spiwrite ; send byte
ldi r16,$88 ; load fcf(15:8) byte - $88 for data packet
rcall spiwrite ; send byte
ldi r16,$00 ; load sequence byte
rcall spiwrite ; send byte
ldi r16,$aa ; load destination panid(7:0) byte
rcall spiwrite ; send byte
ldi r16,$cc ; load destination panid(15:8) byte
rcall spiwrite ; send byte
ldi r16,$bb ; load destination address(7:0) byte
rcall spiwrite ; send byte
ldi r16,$dd ; load destination address(15:8) byte
rcall spiwrite ; send byte
ldi r16,$aa ; load source address(7:0) byte
rcall spiwrite ; send byte
ldi r16,$aa ; load source address(15:8) byte
rcall spiwrite ; send byte
mov r16,r25 ; load data byte - button press
rcall spiwrite ; send byte
mov r16,r0 ; load data byte - temperature1
rcall spiwrite ; send byte
mov r16,r1 ; load data byte - temperature0
rcall spiwrite ; send byte
mov r16,r2 ; load data byte - humidity
rcall spiwrite ; send byte
mov r16,r29 ; load data byte - adc1
rcall spiwrite ; send byte
mov r16,r28 ; load data byte - adc0
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high
ret ; return to previous duty

wait6: ; wait ~1s

ser r21

waitloop1:

ser r20
rcall wait2
nop
nop
nop
nop
nop
nop
nop
nop
dec r21
brne waitloop1
ret ; return to previous duty

spiwrite: ; read and write data over spi

out spdr,r16 ; write transmitted byte to spi

wait: ; read spi register to check when done

in r16,spsr
sbrs r16,spif
rjmp wait
in r16,spdr ; write recieved byte to spi register
ret ; return to previous duty

wait2: ; wait timer (~12 cylces per value in r20)

;in r16,pine
;out portd,r16
nop
nop
nop
nop
nop
nop
nop
nop
dec r20
brne wait2
ret ; return to previous duty

clearirq: ; clear irq register and irq line

ldi r16,$8f ; load first data byte - read register irq_status command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high
rcall forcetxoff ; go to tx_off state so you can sleep
sbi portb,portb4 ; pull slp_tr high to enter sleep mode
clt ; clear the t register to indicate that were done waiting
reti ; clear interrupt and return to previous duty

wakeup: ; clear interrupts and return to previous task
nop
nop
nop
reti

;talk to shit15, only works for cpu clock <=2MHZ
;data pin can never be output high - leave pullup off
;needs external pullup resistor for proper operation

wakeupshit15: ; clear interrupts and return
nop
nop
nop
cbi eimsk,4 ; disable int4 as pe4 will still be low when returning
nop
reti


shit15setup: ; set the device to low res mode

rcall shit15reset ; reset the device in case its fuxxored
rcall startshit15 ; send start sequence

;data sequence - register write command $06
sbi porte,porte0 ; clock high - data bit one
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit two
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit three
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit four
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit five
cbi porte,porte0 ; clock low
cbi ddre,dde4 ; data high
sbi porte,porte0 ; clock high - data bit six
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit seven
cbi porte,porte0 ; clock low
sbi ddre,dde4 ; data low
sbi porte,porte0 ; clock high - data bit eight
cbi porte,porte0 ; clock low

rcall shit15ack0 ; wait for ack from shit15

;data sequence - register write data $01
sbi ddre,dde4 ; data low
sbi porte,porte0 ; clock high - data bit one
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit two
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit three
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit four
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit five
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit six
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit seven
cbi porte,porte0 ; clock low
cbi ddre,dde4 ; data high
sbi porte,porte0 ; clock high - data bit eight
cbi porte,porte0 ; clock low

rcall shit15ack0 ; wait for ack from shit15
ret ;done setting up the device

shit15temp: ; read temperature data from shit15
;send read temp commmand
rcall startshit15 ; send start sequence

;data sequence - read temperature command $03
sbi porte,porte0 ; clock high - data bit one
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit two
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit three
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit four
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit five
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit six
cbi porte,porte0 ; clock low
cbi ddre,dde4 ; data high
sbi porte,porte0 ; clock high - data bit seven
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit eight
cbi porte,porte0 ; clock low
;sbi ddre,dde4 ; data low - if last databyte is 1 - leave it high for ack

rcall shit15ack0 ; wait for ack from shit15

sbi eimsk,4 ; enable int4
ldi r16,$07
out smcr,r16 ; set to power-save mode and enable sleep mode
nop
nop
nop
sleep ; sleep while waiting for low level on pe4
nop
nop
nop
clr r16
out smcr,r16 ; disable sleep mode

rcall shit15read ; read out temperature data from shit15 (msb)
rcall shit15ack3 ; acknowledge reciept of bit
mov r0,r16 ; move msb to another register
rcall shit15read ; read out temperature data from shit15 (lsb)
rcall shit15ack4 ; end transmission ack
mov r1,r16 ;  move lsb to another register
ret ; continue with previous task

shit15humidity: ; read humidity data from shit15
;send read humidity command
rcall startshit15 ; send start sequence

;data sequence - read humidity command $05
sbi porte,porte0 ; clock high - data bit one
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit two
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit three
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit four
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit five
cbi porte,porte0 ; clock low
cbi ddre,dde4 ; data high
sbi porte,porte0 ; clock high - data bit six
cbi porte,porte0 ; clock low
sbi ddre,dde4 ; data low
sbi porte,porte0 ; clock high - data bit seven
cbi porte,porte0 ; clock low
cbi ddre,dde4 ; data high
sbi porte,porte0 ; clock high - data bit eight
cbi porte,porte0 ; clock low
;sbi ddre,dde4 ; data low - if last databyte is 1 - leave it high for ack

rcall shit15ack0 ; wait for acknowledge from shit15

sbi eimsk,4 ; enable int4
ldi r16,$07
out smcr,r16 ; set to power-save mode and enable sleep mode
nop
nop
nop
sleep ; sleep while waiting for low level on pe4
nop
nop
nop
clr r16
out smcr,r16 ; disable sleep mode

rcall shit15read ; read out humidity data from shit15 (msb)
rcall shit15ack3 ; acknowledge reciept of bit
rcall shit15read ; read out humidity data from shit15 (lsb)
rcall shit15ack4 ; end transmission ack
mov r2,r16 ;  move lsb to another register
ret ; return with previous task

shit15ack4: ; end transmission ack

sbi porte,porte0 ; clock high - ack
cbi porte,porte0 ; clock low
ret ; return to previous task

shit15ack3: ; data recipet acknowledge

sbi ddre,dde4 ; pull data low
sbi porte,porte0 ; clock high - ack
cbi porte,porte0 ; clock low
cbi ddre,dde4 ; release data line
ret ; return to previous task

shit15read: ; read data from shit15

clr r16 ; clear the register where incoming data will be written
sbi porte,porte0 ; clock high - data bit one
sbic pine,pine4 ; check if data is low
sbr r16,$80 ; write data bit one to register
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit two
sbic pine,pine4 ; check if data is low
sbr r16,$40 ; write data bit two to register
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit three
sbic pine,pine4 ; check if data is low
sbr r16,$20 ; write data bit three to register
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit four
sbic pine,pine4 ; check if data is low
sbr r16,$10 ; write data bit four to register
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit five
sbic pine,pine4 ; check if data is low
sbr r16,$08 ; write data bit five to register
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit six
sbic pine,pine4 ; check if data is low
sbr r16,$04 ; write data bit six to register
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit seven
sbic pine,pine4 ; check if data is low
sbr r16,$02 ; write data bit seven to register
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high - data bit eight
sbic pine,pine4 ; check if data is low
sbr r16,$01 ; write data bit eight to register
cbi porte,porte0 ; clock low
ret ; return to previous activity

startshit15: ; start sequence

cbi ddre,dde4 ; set data high
cbi porte,porte0 ; make sure clock is low
sbi porte,porte0 ; pull clock high
sbi ddre,dde4 ; set data low
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high
cbi ddre,dde4 ; data high
cbi porte,porte0 ; clock low
sbi ddre,dde4 ; data low
ret ; return to previous task

shit15ack0: ; ack sequence for sending data

cbi ddre,dde4 ; release data line

shit15ack2: ; check that data line is low

sbic pine,pine4
rjmp shit15ack2
sbi porte,porte0 ; clock high - ack
cbi porte,porte0 ; clock low

shit15ack1: ; check that line has been released

sbis pine,pine4 ; check that line has been released
rjmp shit15ack1
ret ; return to previous task

shit15reset: ; reset sequence if it gets out of phase
;status register preserved
;must be followed by data start sequence

cbi ddre,dde4 ; data high
sbi porte,porte0 ; clock high
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high
cbi porte,porte0 ; clock low
sbi porte,porte0 ; clock high
cbi porte,porte0 ; clock low
ret ; return to previous task

transmitbeacon: ; transmit a beacon frame

sbi portb,portb4 ; pull slp_tr high to begin transmit
nop ; delay to make sure the pin is high long enough
cbi portb,portb4 ; pull slp_tr low

ldi r16,$60 ; load data byte - write buffer command
cbi portb,portb0 ; pull ss low
rcall spiwrite ; send byte
ldi r16,$0b ; load data byte - frame length byte
rcall spiwrite ; send byte
ldi r16,$40 ; load data byte - fcf(7:0) - broadcast,no ack
rcall spiwrite ; send byte
ldi r16,$88 ; load data byte - fcf(15:8) - short address,pan_ids equal
rcall spiwrite ; send byte
ldi r16,$00 ; load data byte - seq(7:0)
rcall spiwrite ; send byte
ldi r16,$aa ; load data byte - pan_id(7:0)
rcall spiwrite ; send byte
ldi r16,$cc ; load data byte - pan_id(15:8)
rcall spiwrite ; send byte
ldi r16,$ff ; load data byte - destination address (7:0) - broadcast
rcall spiwrite ; send byte
ldi r16,$ff ; load data byte - destination address (15:0) - broadcast
rcall spiwrite ; send byte
ldi r16,$bb ; load data byte - source address (7:0)
rcall spiwrite ; send byte
ldi r16,$bb ; load data byte - source address (15:8)
rcall spiwrite ; send byte
sbi portb,portb0 ; pull ss high
ret ; return to previous duty






