Kailiang Chen

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Kailiang Chen, Ph.D. Candidate,
Department of Electrical Engineering and Computer Science,
Massachusetts Institute of Technology


Address:

50 Vassar St Rm 38-265,
Cambridge, MA 02139

Email:

chenkl@mit.edu

About Me

I received the B.S. degree in electrical engineering with highest honors from Tsinghua University, Beijing, in 2007 and the S.M. degree in electrical engineering and computer science from the Massachusetts Institute of Technology (MIT), Cambridge, in 2009. I am currently pursuing the Ph.D. degree at MIT, working with Prof. Charles Sodini and Prof. Anantha Chandrakasan on the 3D wearable medical ultrasound project.

My research interests include the analog front-end transceiver circuit design, medical ultrasound imaging, and medical device development. In summer 2011, I was with Texas Instruments, Dallas, TX, working on the ultrasonic low noise amplifier design and the ultrasound signal chain modeling.

I was the First-Class Fellowship winner for four consecutive years in Tsinghua University. I received a Lucent Global Science Scholarship in 2005 and a Siebel Scholarship in 2009. I was a recipient of the Best Design Award in the IEEE Asian Solid-State Circuits Conference in 2012.


Ongoing Research

Analog Front-End Design for portable / wearable 3D Medical Ultrasound Imaging Systems

My project aims to implement portable or wearable 3D ultrasound imaging systems to meet the new medical needs both in hospital and at home. We use a MEMS type ultrasound transducer called CMUT, which can be compactly integrated with electronics using flip-chip bonding technology. At the same time, we propose the highly parallelized architecture for the ultrasound analog front-end circuit. It greatly reduces the electrical interconnections out of a big 2D array, but can still electronically steer the ultrasound beam in 3D space.

Up to now, we have successfully demonstrated a 4-channel ultrasound transceiver test chip. In particular, the transmitter delivers 50% more acoustic power with given total power budget, thanks to its 3-level pulse shaping design. We've also demonstrated the Doppler flow measurement in lab; and developed various imaging and beamforming algorithms for our architecture. We are currently taping out a 2D analog front-end chip and a digital beamforming chip to demonstrate the complete system.

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