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A Lithium Solid-State Memristor - Modulating Interfaces and Defects for Novel Li-Ionic Operated Memory and Computing Architectures

Senior Investigator

Jennifer L.M. Rupp, Assistant Professor, Department of Materials Science and Engineering

This project focus is on the research of lithium ionic carrier and defect kinetics in oxides to design material architectures and interfaces for novel "Li-operated memristors as alternative memory and non-binary computing architectures". The digital revolution relies on fast and efficient data collection, storage, and information transfer. Since the early days of computers, information is processed in logic elements that are built up from electronically controlled transistors based on binary states. However, further down-scaling of transistors will soon be prohibited by physical limits as well as their increasing power demand. Here, the use of ionically-controlled memristors – nanometersized and analog – could allow for the realization of highly functional, low-energy circuit elements operating on multiple resistance states and to encode information beyond binary.

Memristors are resistive elements whose structure is typically composed of a transition metal oxide thin film sandwiched between two metallic electrodes. The application of a sufficiently high electric field induces a non-volatile resistance change linked to locally induced redox processes in the oxide. Through varying the voltage amplitude and duration, several distinct resistance levels can be achieved in the memristor by formation of either conductive filaments with ionic carriers (mostly O2−, Ag+ or Cu2+) or their charge/defect accumulation at the oxide/electrode interfaces in the device. The fingerprint of a memristor is an hysteretic current-voltage profile, which depends on the magnitude, polarity and time range of the applied voltage to the metal/oxide/metal structure, defining the redistribution of ionic carriers and defects in the device. Key challenges to replace today`s electronic transistors by ionic memristors are the low retention of addressable resistance states (caused by e.g. unstable charge potentials at the interfaces) and lack in understanding of charge/mass transfer kinetics at high electric fields driving future switching times and energy consumption. Only limited defect chemistry and ion migration kinetics studies exist for oxides and interfaces under high electric fields; also the nature of switching ions (e.g. from host lattice vs. other mobile ions require attention).

The idea of this research is to design, fabricate and investigate Li-based memristors based on monolayers and heterostructures of Li-oxides with controllable space charge potentials at their interfaces. For this, as the first part of this research, we make and study Li-oxide films with variable capacitance, operation voltage range and Li-ionic transfer kinetics under high electric field strengths and probe their memristive function. We will then assess their Li space-charge potentials at the interfaces, structural stability, retention and defect formation as they form the backbone to the Li-heterostructure memristor concept in the second project part. Methods for thin film fabrication and for probing structure-defect-carrier properties of Li-oxides and their interfaces by ex-situ techniques and also novel in-operando electrochemistry/wavelength-dependent Raman spectroscopy are discussed. Innovative and interdisciplinary opportunities for collaboration with CMSE/MIT faculty are highlighted.

The innovation in this research will be in making the first Li-memristors/resistive switches based on heterostructures with systematically altered space charge potentials by alternations of width and extension of high Li-capacitive monolayers and low Li capacitive/fast conductive monolayers. The outcome of this research will produce systematic model experiments to understand role of Li/defect space charges for memristors and a new strategy to increase retention by number of Li heterostructure interfaces on resistive switching and potentially number of addressable states.

 

 

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Seed-IV
Superseed
Seed I 2017
Seed II 2017
Seed III 2017
Seed IV 2017
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