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Reasonable buffer sizes
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The lab specs say that there are supposed to be four buffer-size
selector switches.  This means that there should be 16 possible buffer 
sizes.  Clearly, the largest buffer size should be 4K, large enough to 
completely fill the RAM.  What should the smallest buffer size be?

Assume the lowest sampling rate (9600 Hz) and a not-too-unreasonably
low input signal frequency (96 Hz, say; that's about two octaves
below middle C).  This means that a complete cycle takes up 100 input
samples.  This suggests that we might want some really small input
buffers, perhaps as small as 64 bytes for experimental purposes.
Using only powers of two, we have 64, 128, 256, 512, 1024, 2048, 4096
bytes, for a total of seven possibilities.  A larger buffer is
impossible.  For simplicity and range, we will support buffer sizes:

24 32 48 64 96 128 192 256 384 512 768 1024 1536 2048 3072 4096

The "default" (all switches 0) should probably be the largest buffer
size.  Using a 24-byte buffer shouldn't actively cause problems,
though you'll get weird results from just about any input (excepting,
perhaps, TMBG's "O Do Not Forsake Me".)


This setup allows for some cleverness.  Namely, we can use three bits
of the size selector to indicate a shift left, and the last bit to
figure out what it is we should test against.  For example, using a
size select of 1110 (32 bytes), we want to find out if two addresses
are over the buffer limit; let's try 31 and 32.  Shift left seven
bits, to get 3968; this is less than 4096 (or the 4096 bit isn't set), 
For 32, shift left to get 4096; since the 4096 bit is set, the buffer
is full.

For odd sizes, we need to check more bits.  For the 3072 buffer size,
for example, we need to test if the 4096 bit is set, or if both the
2048 and the 1024 bits are set.  This should be reflected in the
relevant VHDL file (fulldet.vhd).