MIT SEMINAR SERIES IN MANUFACTURING AND PRODUCTIVITY
Place: Room 33-116 Time: 12:00 P.M. Tuesday, October 23rd, 2007
Assistant Professor of Electrical and Computer Engineering,
Purdue University, West Lafayette, IN
In spite of the many advances that researchers have made at the micro and
nanoscale, the metrology infrastructure is largely imprecise and impractical.
Test and measurement of geometry or material properties often require scarce,
highly-specialized tools. These tools are typically not amenable to batch
fabrication quality control; are not easily transportable; are not
comprehensive in the numerous properties; and are typically very expensive.
Poor relative error is a most significant bottleneck for researchers and
developers at this scale. Due to imprecision, developing national and
international measurement standards has been difficult. Not only do these
problems negatively affect commerce, these problems negatively affect the rate
of technological advancements.
In this talk I propose a novel metrology method which can be used to alleviate
the above problems. By using this method, precise measurements of mechanical
properties can be extracted in terms of precise electrical measurements by using
on-chip (or off-chip) electronics. For instance, properties such as Young's
modulus, material density, geometry, displacement, force, and many others can
be extracted in terms of changes in capacitance with attofarad to zeptofarad
resolution. Theoretical and simulation results show that this method can
achieve much better relative error than convention (by three to six orders of
Last, I discuss potential uses of this new technology to future manufacturing of
small-scale devices. For example, automated batch fabrication quality control;
self-calibrating microsystems; post-packaged re-calibration after long-term
dormancy, after harsh environmental change, or in aqueous environments;
bridging the gap between simulation and experiment for robust designs;
experimentally-accurate models; and micro and nanoscale measurement standards.
Prof. Jason Clark received his B.S. degree in Physics from the California State
University East Bay in 1996. He received his Ph.D. in Applied Science and
Technology from the University of California at Berkeley in 2005. He has held
positions at the Lawrence Livermore National Laboratory, the Berkeley National
Laboratory, Coventor, the Berkeley Sensor and Actuator Center, the UC Berkeley
Biomedical Microdevices Center, and Wayne State University. He is the inventor
of Electro Micro Metrology and the key developer of a CAD for MEMS package. He
joined Purdue in August 2006.
Dr. Clark's research interests are in the design, modeling, simulation, and
realization of complex engineered systems. In particular, he is developing a
computationally efficient multidisciplinary computer aided engineering tool
for complex micro and nanoscale systems, and he is developing measurement
tools for the extraction of nanoscale geometry and material properties.