" " " Begin include file cache_print.incl.alm " " Last modified by Sherman D. Sprague 02/11/81 for DPS8 support. " print_cache_header: stx2 pch_x mlr (),(),fill(020) "routine to set up header and print it desc6a cache_hdr,(chdrend-cache_hdr)*6 desc6a pthdr,100 tsx2 rdclock get date/time in their sta pthdr+16 stq pthdr+17 tsx2 headform print it tsx2 space tsx2 print print another line pch_x: tra *-* cache_hdr: bci '1blk level abs addr f/e rro ' bci ' blk contents ' bci ' --- multics cache dump ' chdrend: " print_cache_block: " "This routine prints the cloumn "of cache specified by the address in A. sreg cache_block_save_regs "save regs ana ccolm1x4 insure a meaningful address sta cache_block_addr save it tsx2 space clear line lda cache_block_addr restore address tsx2 octwd convert the address qls 12 move into qu stcq line,74 store these digits lda cache_block_addr reload address tsx2 get_cache get actual cache contents lda cache_dir get any status word cana cmr.column_full,dl see if col-full is on tze *+3 skip store if not lda =hc-full get marker sta line+1 eax0 0 x0 moves along directory eax1 0 x1 moves along cache contents cache_block_loop: eax3 11 x3 is a character index for line stx0 cache_octbuf get level mlr (),(x3) move that single digit desc6a cache_octbuf(2),1 desc6a line,1 eax3 6,3 allow 5 spaces after it lda cache_dir,0 get directory address ana cmr.address_mask,du isolate address arl cmr.address_shift position it ora cache_block_addr make coherent address format tsx2 octwd convert it staq cache_octbuf move to memory mlr (),(x3) desc6a cache_octbuf(4),8 move address to line desc6a line,8 eax3 12,3 allow 4 spaces after epp4 =hfull " assume full level lda cache_dir,0 get status word cana cmr.level_full,du see if level full tnz *+2 br if full epp4 =hempty " assume empty mlr (pr),(x3) move full/empty desc6a 4|0,5 desc6a line,5 eax3 7,3 allow 3 spaces after ana cmr.rro_mask,dl isolate ctr arl cmr.rro_shift get in lowest a pos sta cache_octbuf save as octal mlr (),(x3) desc6a cache_octbuf(5),1 desc6a line,1 move to output line eax3 2,3 allow 2 spaces eax7 4 count words on level cache_put_next: lda cache_contents,1 get data word eax1 1,1 move to next word tsx2 octwd convert staq cache_octbuf mlr (),(x3) desc6a cache_octbuf,12 desc6a line,12 eax3 14,3 allow 2 spaces eax7 -1,7 see if line full tnz cache_put_next no tsx2 print print line tsx2 space clear line eax0 1,0 do next level cmpx0 4,du if there is one tmi cache_block_loop tsx2 print print a blank line lreg cache_block_save_regs tra 0,2 return eight cache_block_save_regs: bss ,8 cache_octbuf: bss ,2 cache_block_addr: oct 0 " dump_all_cache: "routine to dump all cache to printer stx2 dump_all_cache_x2 lda 0,dl start at first block tsx2 print_cache_header print the cache header dump_all_cache_loop: tsx2 print_cache_block ada 4,dl go to next block cmpa ccolx4 if not done tmi dump_all_cache_loop dump_all_cache_x2: tra *-* " include get_cache " " " ----------------------------------------------------------- " " " " Historical Background " " This edition of the Multics software materials and documentation is provided and donated " to Massachusetts Institute of Technology by Group Bull including Bull HN Information Systems Inc. " as a contribution to computer science knowledge. " This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, " Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell Bull Inc., Groupe Bull " and Bull HN Information Systems Inc. to the development of this operating system. " Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), " renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership " of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for " managing computer hardware properly and for executing programs. Many subsequent operating systems " incorporated Multics principles. " Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., " as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . " " ----------------------------------------------------------- " " Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without " fee is hereby granted,provided that the below copyright notice and historical background appear in all copies " and that both the copyright notice and historical background and this permission notice appear in supporting " documentation, and that the names of MIT, HIS, Bull or Bull HN not be used in advertising or publicity pertaining " to distribution of the programs without specific prior written permission. " Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. " Copyright 2006 by Bull HN Information Systems Inc. " Copyright 2006 by Bull SAS " All Rights Reserved " "