/* BEGIN include file adp_scu.incl.pl1 */

/* This include file describes the data stored by the scu instruction on
the adp processor.

Written 9/83 by Keith Loepere. */

/* format: style4,indattr,ifthenstmt,ifthen,idind33,^indcomtxt */

dcl  adp_scup		        ptr;

dcl  1 adp_scu		        based (adp_scup) aligned,

/* Word 0 */

       2 unknown1		        bit (14) unal,
       2 itc		        bit (4) unal,	/* count of indirect tally words in chain */
       2 op_code		        bit (10) unal,	/* normally of faulting instruction */
       2 i		        bit (1) unal,	/* interrupt inhibit bit of faulting instr */
       2 a		        bit (1) unal,	/* indirect via pointer register */
       2 tag		        bit (6) unal,	/* tag field */

/* Word 1 */

       2 (
       iro,					/* illegal ring order */
       oeb,					/* out of execute bracket */
       e_off,					/* no execute permission */
       orb,					/* out of read bracket */
       r_off,					/* no read permission */
       owb,					/* out of write bracket */
       w_off,					/* no write permission */
       no_ga,					/* not a gate */
       ocb,					/* out of call bracket */
       ocall,					/* outward call */
       boc,					/* bad outward call */
       zero1,
       crt,					/* cross ring transfer */
       ralr,					/* ring alarm */
       zero2,
       oosb,					/* out of segment bounds */
       zero3,
       zero4,
       ioc,					/* illegal op code */
       it,					/* illegal tag */
       im,					/* illegal mode */
       if,					/* fault occured during instrcution fetch */
       zero5,
       fsdw,					/* fault during sdw fetch */
       zero6,
       ied					/* illegal eis digit */
       )			        bit (1) unal,
       2 unknown2		        bit (4) unal,
       2 hw_ind		        bit (6) unal,	/* hw restart indicators */

/* Word 2 */

       2 hw_info2		        bit (36),		/* restart info */

/* Word 3 */

       2 hw_info3		        bit (36),		/* restart info */

/* Word 4 */

       2 ilc		        bit (18) unal,	/* instruction counter */
       2 ir		        bit (18) unal,	/* indicator registor */

/* Word 5 */

       2 unknown3		        bit (9) unal,
       2 tprv		        bit (1) unal,	/* tpr valid */
       2 zero7		        bit (1) unal,
       2 fi_flag		        bit (1) unal,	/* 1 => interrupt, 0 => fault */
       2 fi_num		        bit (5) unal,	/* (fault/interrupt) number */
       2 zero8		        bit (1) unal,
       2 unknown4		        bit (2) unal,
       2 cpu_no		        bit (2) unal,	/* CPU number */
       2 unknown5		        bit (14) unal,

/* Word 6 */

       2 zero9		        bit (3) unal,
       2 psr		        bit (15) unal,	/* procedure segment register */
       2 prr		        bit (3) unal,	/* procedure ring register */
       2 zero10		        bit (4) unal,
       2 p		        bit (1) unal,	/* procedure privileged bit */
       2 zero11		        bit (4) unal,
       2 tag43		        bit (6) unal,	/* has its 43 tag */

/* Word 7 */

       2 trr		        bit (3) unal,	/* temporary ring register */
       2 tsr		        bit (15) unal,	/* temporary segment register */
       2 ca		        bit (18) unal;	/* computed address */

/* END include file adp_scu.incl.pl1 */


*/
                                          -----------------------------------------------------------


Historical Background

This edition of the Multics software materials and documentation is provided and donated
to Massachusetts Institute of Technology by Group Bull including Bull HN Information Systems Inc. 
as a contribution to computer science knowledge.  
This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology,
Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell Bull Inc., Groupe Bull
and Bull HN Information Systems Inc. to the development of this operating system. 
Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970),
renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership
of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for 
managing computer hardware properly and for executing programs. Many subsequent operating systems 
incorporated Multics principles.
Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., 
as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. .

                                          -----------------------------------------------------------

Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without
fee is hereby granted,provided that the below copyright notice and historical background appear in all copies
and that both the copyright notice and historical background and this permission notice appear in supporting
documentation, and that the names of MIT, HIS, Bull or Bull HN not be used in advertising or publicity pertaining
to distribution of the programs without specific prior written permission.
    Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc.
    Copyright 2006 by Bull HN Information Systems Inc.
    Copyright 2006 by Bull SAS
    All Rights Reserved

*/