/* BEGIN INCLUDE FILE ... bos_dump.incl.pl1 ... */ /* Modified 1 September 1976 */ /* Modified 11/11/80 by J. A. Bush for the DPS8/70M CPU */ /* Modified 6/12/81 by Rich Coppola to extend the dps8 extended fault reg to 15 bits */ /* Modified 02/23/81, W. Olin Sibert, to describe old and new FDUMP styles */ dcl dumpptr ptr; /* pointer to following structure */ dcl 1 dump based (dumpptr) aligned, /* header of dump by fdump */ 2 dump_header aligned like dump_header, 2 segs (1008), /* segment array */ 3 segno bit (18) unal, /* segment number */ 3 length bit (18) unal, /* length of segment in sector sized blocks */ 2 amptwregs (0 : 63) bit (36), /* assoc. mem. page table word regs */ 2 amptwptrs (0 : 63) bit (36), /* assoc. mem. page table word pointers */ 2 amsdwregs (0 : 63) bit (72), /* assoc. mem. segment descriptor word registers */ 2 amsdwptrs (0 : 63) bit (36), /* assoc. mem. segment descriptor word pointers */ 2 ouhist (0 : 63) bit (72), /* operations unit history registers */ 2 cuhist (0 : 63) bit (72), /* control unit history registers */ 2 duhist (0 : 63) bit (72), /* decimal unit history registers */ 2 auhist (0 : 63) bit (72), /* appending unit history registers */ 2 prs (0 : 7) ptr, /* pointer registers */ 2 regs aligned like dump_registers, /* assorted machine registers */ 2 low_order_port bit (3), /* from which clock is read */ 2 pad4 bit (36), 2 mctime fixed bin (52), /* time conditions were taken */ 2 pad5 (0 : 3) bit (36), 2 misc_registers like dump_misc_registers, /* Assorted registers & processor data */ 2 ptrlen (0 : 7) bit (36), /* pointers and lengths for EIS */ 2 coreblocks (0 : 7), 3 num_first bit (18) unal, /* first addr in coreblock */ 3 num_blocks bit (18) unal, /* number of blocks used */ 2 pad7 (112) fixed bin; dcl 1 dump_header aligned based, /* Standard header for FDUMP */ 2 words_dumped fixed bin (35), /* total words in dump */ 2 valid bit (1), /* = 1 if there is a 6180 dump to be had */ 2 time fixed bin (71), /* time of dump */ 2 erfno fixed bin (18), /* Error Report Form Number */ 2 num_segs fixed bin, /* number of segments dumped */ 2 valid_355 bit (1), /* = 1 if there is a dn355 dump to be had */ 2 dumped_355s bit (4), /* indicates which 355s were dumped */ 2 time_355 fixed bin (71), /* time of 355 dump */ 2 version fixed bin, /* currently 2 */ 2 pad0 (5) fixed bin; /* pad0 to 16 words */ dcl 1 dump_registers aligned based, /* Standard (SREG) arrangement of registers in dump */ (2 x (0 : 7) bit (18), /* index registers */ 2 a bit (36), /* the a register */ 2 q bit (36), /* the q register */ 2 e bit (8), /* the e register */ 2 pad2 bit (28), /* pad */ 2 t bit (27), /* timer register */ 2 pad3 bit (6), /* pad */ 2 ralr bit (3)) unaligned; /* ring alarm register */ dcl 1 dump_misc_registers aligned based, 2 scu (0 : 7) bit (36), /* from store control unit instr. */ 2 mcm (0 : 7) bit (72), /* memory controller masks every 64 K */ 2 dbr bit (72), /* descriptor segment base register */ 2 intrpts bit (36), /* interrupts */ 2 bar bit (36), /* base address register */ 2 modereg bit (36), /* mode register */ 2 cmodereg bit (36), /* cache mode register */ 2 faultreg bit (36), /* fault register */ 2 ext_fault_reg bit (15) unaligned, /* DPS8 extended fault register */ 2 pad6 bit (21) unaligned; dcl 1 v1_dump aligned based (dumpptr), /* Old version of FDUMP (pre March, 1981) */ 2 dump_header aligned like dump_header, 2 segs (688), /* segment array */ 3 segno bit (18) unal, /* segment number */ 3 length bit (18) unal, /* length of segment in sector sized blocks */ 2 amsdwregs (0 : 15) bit (72), /* assoc. mem. segment descriptor word registers */ 2 amsdwptrs (0 : 15) bit (36), /* assoc. mem. segment descriptor word pointers */ 2 amptwregs (0 : 15) bit (36), /* assoc. mem. page table word regs */ 2 amptwptrs (0 : 15) bit (36), /* assoc. mem. page table word pointers */ 2 pad1 (0 : 15) bit (36), 2 ouhist (0 : 15) bit (72), /* operations unit history registers */ 2 cuhist (0 : 15) bit (72), /* control unit history registers */ 2 auhist (0 : 15) bit (72), /* appending unit history registers */ 2 duhist (0 : 15) bit (72), /* decimal unit history registers */ 2 prs (0 : 7) ptr, /* pointer registers */ 2 regs aligned like dump_registers, /* assorted machine registers */ 2 mctime fixed bin (52), /* time conditions were taken */ 2 pad4 (0 : 5) bit (36), 2 misc_registers aligned like dump_misc_registers, /* Assorted registers */ 2 pad5 bit (36), 2 ptrlen (0 : 7) bit (36), /* pointers and lengths for EIS */ 2 pad6 (15) bit (36), 2 low_order_port bit (3), /* from which clock was read */ 2 coreblocks (0 : 7), 3 num_first bit (18) unal, /* first addr in coreblock */ 3 num_blocks bit (18) unal; /* number of blocks used */ dcl DUMP_VERSION_1 fixed bin internal static options (constant) init (1); dcl DUMP_VERSION_2 fixed bin internal static options (constant) init (2); /* END INCLUDE FILE ... bos_dump.incl.pl1 ... */ */ ----------------------------------------------------------- Historical Background This edition of the Multics software materials and documentation is provided and donated to Massachusetts Institute of Technology by Group Bull including Bull HN Information Systems Inc. as a contribution to computer science knowledge. This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell Bull Inc., Groupe Bull and Bull HN Information Systems Inc. to the development of this operating system. Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for managing computer hardware properly and for executing programs. Many subsequent operating systems incorporated Multics principles. Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . ----------------------------------------------------------- Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without fee is hereby granted,provided that the below copyright notice and historical background appear in all copies and that both the copyright notice and historical background and this permission notice appear in supporting documentation, and that the names of MIT, HIS, Bull or Bull HN not be used in advertising or publicity pertaining to distribution of the programs without specific prior written permission. Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. Copyright 2006 by Bull HN Information Systems Inc. Copyright 2006 by Bull SAS All Rights Reserved */