/* BEGIN dn355_data.incl.pl1 */ /****^ HISTORY COMMENTS: 1) change(88-06-15,Berno), approve(88-07-13,MCR7928), audit(88-06-15,Parisek), install(88-07-19,MR12.2-1061): Add data needed for the uncp multiplexer (DSA gateway) interface implementation. 2) change(89-03-20,Parisek), approve(89-06-06,MCR8110), audit(89-10-09,Farley), install(89-10-25,MR12.3-1100): Add support of protocol mpx. END HISTORY COMMENTS */ /* Date Last Modified and Reason Created 07/25/74 by R. B. Snyder for new ttydim. Modified 06/23/77 by J. Stern to add channel_work_reqd and cwork_count Modified 08/14/78 by Robert Coren to remove devx_tab and invent PCBs Modified 79 May 14 by Art Beattie to add fnp_mem_size Modified December 1979 by Robert Coren to add FNP queue lock Modified January 1980 by Larry Johnson to increase max number of FNPs to 8 Modified 02/12/80 by Robert Coren to add dcw_list_array_ptr Modified 03/06/80 by Robert Coren to add some metering info Modified 12/10/80 by Robert Coren to add get_meters_waiting flag Modified 83-12-16 BIM to use a chanid instead of iom/channel fb's. Modified 1984-07-26 BIM for paged iom. Modified in September 1985 for the DN7100 version interim. */ /* LOCKING RULES: A fnp is locked by its LCTE unless its LCTE is uninitialized. In that case, the configuration_lock must be held. if tty_lock$lock_lcte returns io_no_permission, then the caller must lock$lock_fast the configuration lock and retry the LCTE lock. If the lcte is now initialized, too bad. Otherwise, the config lock protects. Configuration locking is interesting to init_multiplexer and all of fnp t&d and reconfiguration. The guts of the multiplexer pay no attention to it. Thus, if the LCTE can be locked, it MUST be locked before changing the io_manager_assigned flag. */ /* format: style4,delnl,insnl,^ifthendo */ dcl max_no_355s fixed bin int static init (8) options (constant); /* max no of 355s we can handle (arbitrary) */ dcl dn355_data$ external fixed bin; dcl infop pointer; dcl fnpp ptr; dcl 1 datanet_info aligned based (infop), 2 configuration_lock aligned, 3 pid bit (36) aligned, 3 event bit (36) aligned, 3 flags aligned, 4 notify_sw bit (1) unaligned, 4 pad bit (35) aligned, 2 no_of_355s fixed bin, /* no. of FNP's */ 2 trace bit (1) aligned, /* watch events on console */ 2 debug_stop bit (1) aligned, /* crash on errors */ 2 uncp_bufp ptr, /* pointer to the circular buffer */ 2 protocol_datap ptr, /* pointer to protocol_mpx data */ 2 pad1 (6) bit (36) aligned, 2 per_datanet (max_no_355s) aligned like fnp_info; /* data per datanet */ dcl 1 fnp_info aligned based (fnpp), /* structure for each FNP */ 2 mbx_pt pointer, /* pointer to mailbox NULL if not in config */ 2 pcb_array_ptr pointer, /* pointer to array of physical channel blocks */ 2 dcw_list_array_ptr pointer, /* pointer to array of space reserved for output DCW lists */ 2 no_of_channels fixed bin, /* number of channels on this FNP */ 2 fnp_id, 3 fnp_tag char (1) unaligned, /* letter identifying FNP */ 3 fnp_number fixed bin (9) unsigned unaligned, /* sequence number of FNP */ 3 padc bit (18) unaligned, 2 io_chanid char (8) aligned, 2 io_manager_chx fixed bin (35), /* devx for DIA on iom */ 2 lsla_idx (0:5) fixed bin aligned, /* index into PCB array for lsla lines */ 2 hsla_idx (0:2) fixed bin aligned, /* index into PCB array for hsla lines */ 2 count fixed bin, /* number of items in delay queue */ 2 cur_ptr fixed bin, /* offset in tty_buf of next delay queue element */ 2 last_ptr fixed bin, /* offset in tty_buf of last delay queue element */ 2 bleft_355 fixed bin, /* number of free buffers in this 355 */ 2 flags, 3 work_reqd bit (1) unaligned, /* mailbox messages queued up */ 3 bootloading bit (1) unaligned, /* currently being bootloaded */ 3 running bit (1) unaligned, /* this FNP is running */ 3 wired bit (1) unaligned, /* bootload buffer is wired */ 3 dump_patch_in_progress bit (1) unaligned, /* a dump or patch order is in progress */ 3 level_3_pending bit (1) unaligned, /* level 3 interrupt pending */ 3 level_7_pending bit (1) unaligned, /* level 7 interrupt pending */ 3 dump_patch_disabled bit (1) unaligned, /* dump & patch orders disabled because of timeout */ 3 t_and_d_in_progress bit (1) unaligned, /* T & D using FNP */ 3 t_and_d_lev_3_occurred bit (1) unaligned, /* A level 3 occurred */ 3 t_and_d_lev_7_occurred bit (1) unaligned, 3 t_and_d_notify_requested bit (1) unaligned, 3 t_and_d_assigned bit (1) unaligned, /* AS has given fnp to process */ 3 get_meters_waiting bit (1) unaligned, /* waiting for meter copy to complete */ 3 padb bit (7) unaligned, 3 active_dial unaligned, 4 active_bit (15) bit (1) unaligned, /* ON if the process is active */ 2 lcte_ptr ptr, /* pointer to this FNP's LCT entry */ 2 astep ptr, /* pointer to aste of wired bootload buffer */ 2 boot_ev_chan fixed bin (71), /* event channel over which to signal bootload completion */ 2 boot_process_id bit (36), /* process that initiated bootload */ 2 version char (4), /* version id of core image */ 2 fnp_mem_size fixed bin (18) unsigned, /* memory size of this FNP in 18-bit words */ 2 queue_lock bit (36) aligned, /* lock for interrupt queue */ 2 dump_patch_lock bit (36), /* lock for fnp_dump or _patch operation */ 2 q_entries_made fixed bin (35), /* count of delay queue entries made */ 2 input_reject_count fixed bin, /* number of times input rejected */ 2 processed_from_q fixed bin (35), /* number of interrupts processed from queue */ 2 fnp_channel_locked fixed bin (35), /* number of times dn355 found per-FNP lock locked */ 2 input_data_transactions fixed bin (35), /* number of mailbox transactions for input */ 2 output_data_transactions fixed bin (35), /* number of mailbox transactions for output */ 2 input_control_transactions fixed bin (35), /* number of mailbox transactions for inbound control info */ 2 output_control_transactions fixed bin (35), /* number of mailbox transactions for outbound control info */ 2 cumulative_mbx_in_use fixed bin (35), /* cumulative count of number of outbound mailboxes in use */ 2 max_mbx_in_use fixed bin, /* maximum number of mailboxes in use at any given time */ 2 mbx_in_use_updated fixed bin (35), /* number of increments to cumulative_mbx_in_use */ 2 mbx_unavailable fixed bin (35), /* number of times had to queue mailbox transaction because none available */ 2 free_size fixed bin (35), /* cumulative amount of bleft_355 */ 2 free_count fixed bin, /* number of adds to above */ 2 fnp_space_restricted_output fixed bin (35), /* number of times available FNP space restricted amount of output sent */ 2 tandd_pcbx fixed bin, /* index of PCB for COLTS channel */ 2 n_pages_wired fixed bin, /* pages wired for loading */ 2 config_flags aligned, 3 available bit (1) unaligned, /* reconfig says "yes" */ 3 io_manager_assigned bit (1) unaligned, /* We have channel assigned to us */ 3 pad bit (34) unaligned, 2 uncp_pcbx1 fixed bin (17) unaligned, /* For the DN7100 */ 2 uncp_pcbx2 fixed bin (17) unaligned, /* For the DN7100 */ 2 ptx fixed bin, /* page table index, used only at bootload */ 2 ptp pointer unaligned; /* page table for this FNP */ /**** The following named constants are used to lay out the iom page tables. Each FNP has to have its own page table because there is not enough room to have eight different bootload images of 32 K and > 64 K of tty_buf THE MAX TTY BUF LENGTH IS 192 K words. We could have another 16 K easily, and then after that it would get hard. */ /**** The layout Page I/O address Memory address Comments ---- ------ -------------- -------- 0 0 xxxxxx invalid PTW 1 2000 2000 write-enabled (mailbox) 2 4000 4000 write-enabled (mailbox) 3 6000 6000 write-enabled (mailbox) 4 10000 as needed bootload image segment page 0 .... .... .... .... 35 110000 as needed bootload image segment page 31 36 112000 xxxxxx invalid PTW ... .... .... .... 63 160000 .... invalid PTW 64 200000 as needed tty_buf page 0 ... .... .... .... 127 260000 as needed tty_buf page 63 255 ...... ..... tty_buf page 191 */ /**** We assume that the page table starts at all zeros. */ declare FIRST_BOOTLOAD_PAGEX fixed bin init (4) int static options (constant); declare FIRST_TTY_BUF_PAGEX fixed bin init (64) int static options (constant); /* End include file dn355_data.incl.pl1 */ */ ----------------------------------------------------------- Historical Background This edition of the Multics software materials and documentation is provided and donated to Massachusetts Institute of Technology by Group Bull including Bull HN Information Systems Inc. as a contribution to computer science knowledge. This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell Bull Inc., Groupe Bull and Bull HN Information Systems Inc. to the development of this operating system. Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for managing computer hardware properly and for executing programs. Many subsequent operating systems incorporated Multics principles. Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . ----------------------------------------------------------- Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without fee is hereby granted,provided that the below copyright notice and historical background appear in all copies and that both the copyright notice and historical background and this permission notice appear in supporting documentation, and that the names of MIT, HIS, Bull or Bull HN not be used in advertising or publicity pertaining to distribution of the programs without specific prior written permission. Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. Copyright 2006 by Bull HN Information Systems Inc. Copyright 2006 by Bull SAS All Rights Reserved */