/* START OF: fim_meters.incl.pl1 * * * * * * * * * * * * * * * * */ /* Declarations useful for programs which interpret the per-cpu fault and cache error counter data maintained in wired_hardcore_data$cpu_X_flt_ctr_array and wired_hardcore_data$cpu_X_cache_err_ctr_array. The fault counters are an array of counts by fault number, where the first NO_HARDWARE_FAULTS fault numbers correspond to hardware faults, and the remaining correspond to sub-cases of hardware faults, as defined procedurally in fim. The per-cpu cache error counters are simply an array of error counters. The cache error counter array is defined as: location ZERO contains the cache size/type and is filled in by init_processor;location 1 thru 12 hold the error counters as filled in by fim_util or page_fault. Written March 1981 by J. Bongiovanni */ /* Modified July 1981 by M. Weaver for undefined_pointer Modified October 1983 by Rich Coppola for support of per-processor fault and cache counters. */ dcl MAX_CPUS fixed bin init (8) int static options (constant); /* current maximum of CPU numbers */ dcl CPU_NAMES (8) char (1) int static options (constant) init ( "A", "B", "C", "D", "E", "F", "G", "H"); dcl (NO_HARDWARE_FAULTS init (32), NO_TOTAL_FAULTS init (128)) fixed bin int static options (constant); dcl EXTANT_FAULT (32) bit (1) unaligned init ((26) (1)"1"b, (5) (1)"0"b, "1"b) int static options (constant); /* by hardware fault no. "1"=> valid */ dcl LONG_FAULT_NAME (128) char (30) init /* full names of faults */ /* begin of hardware faults */ ("shutdown", "store", "mme1", "fault_tag_1", "timer_runout", "command", "derail", "lockup", "connect", "parity", "illegal_procedure", "op_not_complete", "startup", "overflow", "divide_check", "execute", "segment_fault", "page_fault", "directed_fault_2", "directed_fault_3", "access_violation", "mme2", "mme3", "mme4", "linkage_fault", "fault_tag_3", (5) (1)"", "trouble", /* begin of subordinate faults */ "illegal_opcode", "null_pointer", "illegal_modifier", "illegal_ring_order", "not_in_execute_bracket", "no_execute_permission", "not_in_read_bracket", "no_read_permission", "not_in_write_bracket", "no_write_permission", "not_a_gate", "not_in_call_bracket", "outward_call", "bad_outward_call", "inward_return", "cross_ring_transfer", "ring_alarm_fault", "am_fault", "out_of_bounds", "fixedoverflow", "overflow", "underflow", "stringsize", "illegal_procedure", "stack_out_of_bounds", "packed_pointer_fault", "lot_fault", "isot_fault", "system_packed_pointer", (4) (1)" ", "size", "neti", "command", "sus_", "trm_", "wkp_", "undefined_pointer", (56) (1)" ") int static options (constant); dcl SHORT_FAULT_NAME (32) char (3) init /* short names of hardware faults */ ("sdf", "str", "mme", "ft1", "tro", "cmd", "drl", "luf", "con", "par", "ipr", "onc", "suf", "ovf", "div", "exf", "df0", "df1", "df2", "df3", "acv", (3) (1)" ", "ft2", "ft3", (5) (1)" ", "trb") int static options (constant); /* The following table is used to thread subordinate (non-hardware known) faults to primary (hardware known) fault types. Its existence and contents depends on the way fim handles faults, and it corresponds roughly to fault_table in fim. This table is an array of threads by fault number. To follow a thread for a hardware fault, use the value of this table indexed by hardware fault number to find the first subordinate fault number (0=>none). Continue for the subordinate fault until a thread of 0 is encountered. */ dcl THREAD_FAULT (128) fixed bin int static options (constant) init ( 0, 0, 0, 0, 0, 58, 0, 0, 0, 0, 33, 0, 0, 52, 0, 0, 0, 0, 0, 0, 34, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 35, 36, 56, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 57, 53, 54, 55, 66, 0, 72, 59, 60, 61, 68, (67) 0); dcl CACHE_TYPES (0:5) char (9) int static options (constant) init ( "L68_NONE", " L68_2K", " DPS8_8K", " VSSC_8K", "VSSC_16K", "VSSC_32K"); /* The cache size is placed in the first word of the per-processor array by init_processor. The following declarations list the currently known sizes and their decodes */ dcl L68_NONE fixed bin int static options (constant) init (0), L68_2K fixed bin int static options (constant) init (1), DPS8_8K fixed bin int static options (constant) init (2), VSSC_8K fixed bin int static options (constant) init (3), VSSC_16K fixed bin int static options (constant) init (4), VSSC_32K fixed bin int static options (constant) init (5); dcl NO_CACHE_ERR_TYPES fixed bin int static options (constant) init (12); /* Note PFR = Primary Fault Reg (L68/DPS8), EFR = Extended Fault Reg (DPS8) */ dcl CACHE_ERROR_NAME (12) char (32) var int static options (constant) init ( "Primary Dir Parity/MultiMatch", /* Cell 1; PFR Bit 32 */ "PT A Buffer OVFL/PAR/SEQ Err", /* Cell 2; EFR Bit 36 */ "PT B Buffer OVFL/PAR/SEQ Err", /* Cell 3; EFR Bit 37 */ "PT C Buffer OVFL/PAR/SEQ Err", /* Cell 4; EFR Bit 38 */ "PT D Buffer OVFL/PAR/SEQ Err", /* Cell 5; EFR Bit 39 */ "Primary DIR/PT Buffer OVFL", /* Cell 6; EFR Bit 40 */ "WNO Parity ANY Port", /* Cell 7; EFR Bit 41 for DPS8 (cache type = 2) ONLY */ /* NOTE: This counter is NOT USED by the VS&SC Cache, ONLY the 8k model CPU */ "Level 0 Dup Dir Parity", /* Cell 8; EFR Bit 42 */ "Level 1 Dup Dir Parity", /* Cell 9; EFR Bit 43 */ "Level 2 Dup Dir Parity", /* Cell 10; EFR Bit 44 */ "Level 3 Dup Dir Parity", /* Cell 10; EFR Bit 45 */ "Dup Dir MultiMatch"); /* Cell 11; EFR Bit 46 */ /* END OF: fim_meters.incl.pl1 * * * * * * * * * * * * * * * * */ */ ----------------------------------------------------------- Historical Background This edition of the Multics software materials and documentation is provided and donated to Massachusetts Institute of Technology by Group Bull including Bull HN Information Systems Inc. as a contribution to computer science knowledge. This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell Bull Inc., Groupe Bull and Bull HN Information Systems Inc. to the development of this operating system. Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for managing computer hardware properly and for executing programs. Many subsequent operating systems incorporated Multics principles. Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . ----------------------------------------------------------- Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without fee is hereby granted,provided that the below copyright notice and historical background appear in all copies and that both the copyright notice and historical background and this permission notice appear in supporting documentation, and that the names of MIT, HIS, Bull or Bull HN not be used in advertising or publicity pertaining to distribution of the programs without specific prior written permission. Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. Copyright 2006 by Bull HN Information Systems Inc. Copyright 2006 by Bull SAS All Rights Reserved */