/* Begin include file ...... rcerr.incl.pl1 */ /* These are the reconfiguration error codes. */ /* Created 4/5/76 by Noel I. Morris */ /* Modified 5/25/78 by J. A. Bush to add ISOLTS reconfig error codes */ /* Modified 5/79 by BSG for port expander */ /****^ HISTORY COMMENTS: 1) change(88-07-27,Farley), approve(88-10-05,MCR7968), audit(88-10-10,Beattie), install(88-10-14,MR12.2-1166): Added new rcerr_addscu_memoverlap error code. END HISTORY COMMENTS */ dcl (rcerr_addcpu_no_response init (1), /* no response from CPU */ rcerr_addcpu_bad_switches init (2), /* CPU config switches set improperly */ rcerr_addcpu_trouble init (3), /* trouble fault adding CPU */ rcerr_addcpu_startup init (4), /* startup fault adding CPU */ rcerr_addcpu_lockup init (5), /* lockup fault adding CPU */ rcerr_addcpu_gcos init (6), /* attempt to add processor in GCOS mode */ rcerr_addcpu_amoff init (7), /* attempt to add processor with assoc mem off */ rcerr_addcpu_enable init (8) /* controller port for CPU not enabled */ ) fixed bin static options (constant); dcl (rcerr_delcpu_no_stop init (1), /* CPU did not stop running */ rcerr_delcpu_last init (2), /* attempt to delete last CPU */ rcerr_delcpu_no_good_blcpu init (3) /* no suitable bootload CPU left */ ) fixed bin static options (constant); dcl (rcerr_addscu_size init (1), /* memory size discrepancy */ rcerr_addscu_dup_mask init (2), /* duplicate mask assignment */ rcerr_addscu_no_mask init (3), /* no mask assigned to CPU */ rcerr_addscu_bad_mask init (4), /* mask assigned to non-CPU port */ rcerr_addscu_fault init (5), /* fault trying to add controller */ rcerr_addscu_switches init (6), /* some active module has incorrect switches */ rcerr_addscu_enable init (7), /* some active module not enabled */ rcerr_addscu_manual init (8), /* 4MW SCU is in manual mode */ rcerr_addscu_oldexpand init (9), /* Adding 6000 SCU with port expander */ rcerr_addscu_bigconfig init (10), /* SCU has less memory than config cards say */ rcerr_addscu_memoverlap init (11) /* SCU has possible memory address overlap */ ) fixed bin static options (constant); dcl (rcerr_delmain_nomem init (1), /* not enough main memory left */ rcerr_delmain_abs_wired init (2) /* abs wired pages in memory */ ) fixed bin static options (constant); dcl (rcerr_locked init (12), /* database already locked */ rcerr_online init (13), /* device already online */ rcerr_no_config init (14), /* device not in configuration */ rcerr_not_online init (15), /* device not online */ rcerr_range init (16), /* request is out of range */ rcerr_sprq_failed init (17) /* could not set CPU required */ ) fixed bin static options (constant); dcl (rcerr_isolts_locked init (1), /* reconfig_lock locked to another process */ rcerr_isolts_illegal_cpu init (2), /* illegal cpu tag */ rcerr_isolts_cpu_online init (3), /* requested cpu is online */ rcerr_isolts_no_config init (4), /* requested cpu is not configured */ rcerr_isolts_two_scu init (5), /* Must have at least two SCUs to run ISOLTS */ rcerr_isolts_illegal_scu init (6), /* illegal scu tag */ rcerr_isolts_bootload_scu init (7), /* requested scu is the bootload memory */ rcerr_isolts_scu_not init (8), /* requested scu is not configured */ rcerr_isolts_not init (9), /* requesting process is not ISOLTS process */ rcerr_isolts_wrong_cell init (10), /* interrupt answered in correct scu but wrong cell */ rcerr_isolts_wrong_scu init (11), /* interrupt answered in wrong scu */ rcerr_isolts_wrong_scu_cell init (12), /* interrupt answered in wrong scu on wrong cell */ rcerr_isolts_no_response init (13), /* No response to a processor start interrupt */ rcerr_isolts_bad_switches init (14), /* read switch data is not in expected format */ rcerr_isolts_lda_fail init (15), /* A LDA 2 did not operate correctly */ rcerr_isolts_no_str_flt init (16), /* No store falt when a LDA 64k was executed */ rcerr_isolts_no_mask init (17) /* No mask set for test cpu */ ) fixed bin static options (constant); dcl 1 switch_w1 aligned based, /* template for switch word 1, when containing diagnostic info */ (2 cell fixed bin (5), /* interrupt cell being used */ 2 errtag fixed bin (5), /* tag of scu in error */ 2 valid bit (1), /* if on then offset field is valid */ 2 pad bit (5), 2 offset bit (18)) unaligned; /* offset of error if any */ /* End of include file ...... rcerr.incl.pl1 */ */ ----------------------------------------------------------- Historical Background This edition of the Multics software materials and documentation is provided and donated to Massachusetts Institute of Technology by Group Bull including Bull HN Information Systems Inc. as a contribution to computer science knowledge. This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell Bull Inc., Groupe Bull and Bull HN Information Systems Inc. to the development of this operating system. Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for managing computer hardware properly and for executing programs. Many subsequent operating systems incorporated Multics principles. Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . ----------------------------------------------------------- Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without fee is hereby granted,provided that the below copyright notice and historical background appear in all copies and that both the copyright notice and historical background and this permission notice appear in supporting documentation, and that the names of MIT, HIS, Bull or Bull HN not be used in advertising or publicity pertaining to distribution of the programs without specific prior written permission. Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. Copyright 2006 by Bull HN Information Systems Inc. Copyright 2006 by Bull SAS All Rights Reserved */