/* Begin include file ... tdcm_info.incl.pl1 * * Created on 02/20/75 by Bill Silver. * Modified 5/20/77 by Noel I. Morris for DCC. * Modified 3/19/82 by J. A. Bush for Marker interrupt processing * This include file defines the IOI workspace used by tdcm_. */ dcl ws_ptr ptr; /* Pointer to base of tdcm_ IOI workspace. */ dcl 1 ws based (ws_ptr) aligned, /* Starts at base of ioi_ workspace. */ 2 info like ws_info, /* See ws_info structure below. */ 2 ndt_list (10), /* List of non-data transfer IDCWs. */ 3 idcw bit (36), /* IDCWs. */ 2 rw_list (12), /* DCW list for reads and writes. */ 3 idcw bit (36), /* IDCW. */ 3 dcw bit (36), /* DCW. */ 2 mark_tdcw bit (36), /* TDCW to chain the DCW list when processing Markers */ 2 statq (4) like istat, /* A queue of IOI status entries. */ 2 pad_ev ptr, /* to force buffer to even location */ 2 buffer (0 refer (ws.info.buf_size)) bit (36) aligned, 2 buf_end bit (36); /* Marks end of data buffer. */ dcl 1 ws_info based aligned, /* Control information. */ 2 flags, /* All flags in one word. */ (3 attached bit (1), /* ON => tape drive has been attached. */ 3 connected bit (1), /* ON => there is a connect in progress. */ 3 get_size bit (1), /* ON => return actual read count. */ 3 ndtrans bit (1), /* ON => non-data transfer type connect. */ 3 reading bit (1), /* ON => connect issued for reading. */ 3 large_rec bit (1), /* ON => transmitting record longer than 4096 words */ 3 allow_marker bit (1), /* ON => Set up DCW list for marker interrupt processing */ 3 good_ws bit (1)) unaligned, /* ON => can get a workspace big enough to satisfy user. */ 2 buf_size fixed bin, /* Current size of tdcm_ I/O buffer. */ 2 rcp_id bit (36) aligned, /* ID used to communicate with rcp_. */ 2 ioix fixed bin, /* Index used to communicate with ioi_. */ 2 statqx fixed bin, /* Index of current status queue entry. */ 2 process_id bit (36) aligned, /* User's process ID. */ 2 tracks fixed bin, /* Temporary place to save track type. */ 2 wait_list, /* Used to block. */ 3 num_ev_chans fixed bin, /* Number of channels in list. */ 3 wait_echan fixed bin (71), /* Used to wait when blocked. */ 2 fast_echan fixed bin (71), /* Fast event channel used to wait. */ 2 special_echan fixed bin (71), /* Event call channel for special interrupts. */ 2 user_echan fixed bin (71), /* Event channel set up by user in tseg. */ 2 init_echan fixed bin (71), /* Event channel to use after drive attached. */ 2 meters, /* temporary meters */ 3 last_io_time fixed bin (71), /* clock time of last data xfer I/O */ 3 io_delta fixed bin (71), /* total delta times */ 3 low_delta fixed bin (71), /* lowest time between data xfer i/os */ 3 high_delta fixed bin (71), /* longest time between data xfer i/os */ 3 number_ios fixed bin (35), /* number of data xfer i/os */ 3 block fixed bin (35), /* # of times we went blocked awaiting I/O to complete */ 3 no_block fixed bin (35), /* # of times status queue precessed w/o going blocked */ 3 mark_st fixed bin (35), /* # of marker interrupts received */ 3 term_st fixed bin (35), /* # of term interrupts received */ 3 term_ne fixed bin (35), /* # of term interrupts received with no error status */ 3 most_consec_mark fixed bin (35), /* longest burst of marker interrupts processed */ 3 consec_mark fixed bin (35), /* counter for keeping track of consecutive markers */ 3 block_count fixed bin, /* highest number of blocks per I/O call */ 2 subset_size fixed bin, /* max block size of data xfer I/O */ 2 detachx fixed bin, /* Index that tells what has been set up. */ 2 disposition bit (1), /* RCP assignment disposition. */ 2 read_start fixed bin, /* First tseg buffer we are reading into. */ 2 buffer_size (12) fixed bin, /* Data size in each workspace buffer. */ 2 ndt_offsetx fixed bin, /* Offset of non-data transfer DCW list. */ 2 rw_offsetx fixed bin, /* Offset of read/write DCW list. */ 2 mark_offset fixed bin, /* buffer offset of last marker interrupt */ 2 error_count fixed bin, /* Count of errors during attachment. */ 2 read_idcws (0:5) bit (36) aligned, /* An array of read and write IDCW's. */ 2 write_idcws (0:5) bit (36) aligned; /* One for each possible buffer in 1 connect. */ /* End of include file ... tdcm_info.incl.pl1 */ */ ----------------------------------------------------------- Historical Background This edition of the Multics software materials and documentation is provided and donated to Massachusetts Institute of Technology by Group Bull including Bull HN Information Systems Inc. as a contribution to computer science knowledge. This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell Bull Inc., Groupe Bull and Bull HN Information Systems Inc. to the development of this operating system. Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for managing computer hardware properly and for executing programs. Many subsequent operating systems incorporated Multics principles. Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . ----------------------------------------------------------- Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without fee is hereby granted,provided that the below copyright notice and historical background appear in all copies and that both the copyright notice and historical background and this permission notice appear in supporting documentation, and that the names of MIT, HIS, Bull or Bull HN not be used in advertising or publicity pertaining to distribution of the programs without specific prior written permission. Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. Copyright 2006 by Bull HN Information Systems Inc. Copyright 2006 by Bull SAS All Rights Reserved */