" *********************************************************** " * * " * Copyright, (C) Honeywell Bull Inc., 1987 * " * * " * Copyright, (C) Honeywell Information Systems Inc., 1984 * " * * " * Copyright (c) 1972 by Massachusetts Institute of * " * Technology and Honeywell Information Systems, Inc. * " * * " *********************************************************** " HISTORY COMMENTS: " 1) change(85-09-09,Farley), approve(85-09-09,MCR6979), " audit(86-01-31,GDixon), install(86-03-21,MR12.0-1033): " select the proper bootload tape device, when the info in the IDCW & " status word may be different. " 2) change(87-04-02,Farley), approve(87-07-06,MCR7717), " audit(87-07-15,Fawcett), install(87-07-17,MR12.1-1043): " Added chk_mpc_state routine to test the tape controller's intelligence " level, which will allow proper setting of the "cold mpc flag". " 3) change(87-07-23,Farley), approve(87-07-23,PBF7717), " audit(87-07-24,Fawcett), install(87-07-28,MR12.1-1047): " Added POF retry to rd_tape routine, because unwedging of the tape " controller on an IMU takes a long time (> 4sec) to complete (sigh!). " 4) change(87-10-02,Farley), approve(88-02-26,MCR7794), " audit(88-03-04,Fawcett), install(88-03-15,MR12.2-1035): " Added code to copy the IMU bit from the system_fault_vector into the " bootload info area. It will later be copied into " bootload_info$imu_type_iom. " END HISTORY COMMENTS name bootload_tape_label " Written by J. A. Bush 12/80 " Modified for bootload Multics and macros BIM 2/82 " Modified to read in whole first segment by C. Hornig, October 1982. " Modified for DPS88 support by K. Loepere, September 1983. " Modified to run on any IOM by Keith Loepere, March 1984. " Modified 1095-05-16, BIM: don't bomb on padded records. " Modified to run on IMU by Paul Farley, June 1984. " Modified 08/31/84 by Paul Farley to select the proper bootload tape " device, when the info in the IDCW & status word may be different. " " This program is copied by the tape_mult_ "boot_program" control order and " written onto a bootable MST when tape_mult_ is subsequently opened for " writing. This program is put into execution by a bootload sequence as " follows: The system operator depresses initialize and bootload (or " equivalent) on the system console. Assuming an MST with this program written " on its label is mounted and ready on the selected tape drive, the IOM (or " equivalant) hardwired bootload program will read in the first record on the " tape (the label record), starting at location 30 (8) absolute. When the " record has been completely read in, a terminate interrupt is executed. The " interrupt cell used for a terminate interrupt is a function of the IOM " number. For IOM #0, interrupt cell 12 is used, for IOM #1, 2, and 3, " interrupt cells 13, 14, and 15 respectively are used. The interrupt cell is " used to form the interrupt vector address. Since interrupt vectors are two " locations long, the interrupt cell is multiplied by 2. Therefore for IOM #0, " the interrupt vector address would be 24 (10) or 30 (8). IOM #s 1, 2, and 3 " interrupt vector addresses would be 32, 34, and 36 (8) respectively. For the " IOX, only vector address 30 is used. When the processor senses the " terminate interrupt (via an execute interrupt present (xip) signal), a " hardware XED instruction is forced to be executed to the interrupt vector " address formed in the SCU. Since this program is read in so that location 0 " is overlayed at location 30 (8) absolute, by the IOM bootload program, the " XED is forced to execute the transfer vector instructions (2) at the " beginning of the record supplied by tape_mult_ for the appropriate IOM # " and control is transferred to the label "my_zero" from the transfer vector. " " The function of this program is to read the next segment off the boot tape " and to transfer control to it. " " The fault vectors (locations 100 to 177 (8)) are overlayed by an SCU 200/DIS " pair. Therefore if this program dies in a DIS instruction, one can look at " absolute location 200 - 207 for the SCU data stored as the result of the " fault. " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " The IOM Bootload Program: " " The IOM Bootload program looks like this (locations are absolute memory): " " Location Contents Purpose " " 000000 18/0, 18/720201 Bootload channel PCW, word 1 " 000001 3/0, 12/Chan#, 24/0, 3/Port# Bootload channel PCW, word 2 " " 000002 12/Base, 6/0, 15/PIbase, 3/IOM# Info used by bootloaded pgm " 000003 6/Command, 6/Device#, 6/0, 18/700000 " Bootload IDCW - Command is 05 " for tape, 01 for cards. " 000004 18/000030, 18/0 Second IDCW: IOTD to loc 30 " " System fault vector, at 000010 + 2*IOM# " 1/0, 1/IMU, 16/0, 18/616200 DIS 0 instruction " " Terminate interrupt vector, at 000030 + 2*IOM# Overwritten by bootloaded " 18/0, 18/616200 program: a DIS 0 instruction " " IOM Mailbox, at Base*6 " mbx + 07 12/Base, 6/02, 18/000002 Fault channel DCW " mbx + 10 18/0, 18/004000 Connect channel LPW -> PCW " at 000000 " " Channel mailbox, at Base*64 + 4*Chan# " mbx + 0 18/000003, 6/02, 12/0003 Boot dev LPW -> IDCW @ 000003 " mbx + 2 12/Base, 6/0, 18/0 Boot dev SCW -> IOM mailbox " " " For Multics, the IOM Base ("Base") must be 0012, locating the IOM mailbox at " location 001200. " " Multics can only be booted from tape -- booting from cards is not very " useful, since the card reader firmware must be loaded in order to do so. " Unfortunately, we have no genuine boot-from-disk mechanism available to us, " because there is nothing to support the bootload connect in a cold disk MPC. " " The channel number ("Chan#") is set by the switches on the IOM to be the " channel for the tape subsystem holding the bootload tape. The drive number " for the bootload tape is set by switches on the tape MPC itself. " " The IOM number (IOM#) is set by IOM switches. " " The IOX Bootload Program: " " The IOX Bootload program looks like this (locations are absolute memory): " " Location Contents Purpose " " 000000 6/Command, 6/Device#, 6/0, 18/700000 " Bootload IDCW - Command is 05 " for tape " 000001 18/000030, 18/0 Second IDCW: IOTD to loc 30 " " 000004 24/7000000,12/IOXoffset A register value for connect " " System fault vector, at 000010 " 18/1, 18/612000 HALT instruction " " Terminate interrupt vector, at 000030 Overwritten by bootloaded " 18/10, 18/612000 program: a HALT instruction " " IOX mailbox " " 001400 36/0 base addr 0 " 001401 36/0 base addr 1 " 001402 36/0 base addr 2 " 001403 36/0 base addr 3 " 001404 18/777777,18/0 bound 0, bound 1 " 001405 18/0,18/0 bound 2, bound 3 " 001406 24/0,12/3034 channel link word " 001407 18/0,9/400,9/400 lpw " " We compromise between the IOM and IOX version of memory from 1400 onward " with the IOX values except for the lpw which was fetched before the tape " overwrote it. The code will fix it up. The presence of a 0 in the top six " bits of word 0 denote an IOM boot from an IOX boot. " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " include bootload_equs include_nolist make_data_macros include_nolist iom_word_macros include mstr include_nolist tape_io_commands include toe_hold " equ bootload_info,0 " address of IOM bootload program equ_o load_offset,30 " offset of IOM load equ my_offset,load_offset+mst_label.boot_pgm bool cold_tape_mpc,400000 " DU bool imu,200000 " DU equ imu_bit_shift,1 equ_o iom_fault_vector,10 bool iom_num_mask,000007 " DL " Layout of the physical_record_buffer " The first part is common to all phases of the loader. equ prb.prb_it,prb_absloc equ prb.mstrh,prb.prb_it+1 equ prb.data,prb.mstrh+mstr_header_size equ prb.mstrt,prb.data+1024 inhibit on <-><-><-><-><-><-><-><-><-><-><-><-> my_zero: lda bootload_info ana =o770000,du sta system_type-*,ic non-zero for IOX tnz iox_setup-*,ic decor dps8 <<<>>> eax1 7*64 set all controller masks fld 0,dl mask all interrupts sscr 2*8,x1 .. eax1 -64,x1 SSCR will do nothing for unassigned masks tpl -2,ic .. ldt -1,du Prevent timer runout inhibit off <-><-><-><-><-><-><-><-><-><-><-><-> lcpr mr-my_zero+my_offset,04 " clear the mode register lcpr cmr-my_zero+my_offset,02 " disable the cache camp 2 " enable and clear the PTWAM cams 6 " enable and clear the SDWAM " clear the cache stz bootload_info+7 " clear software region ldq bootload_info+2 Get mailbox and int. base word anq iom_num_mask,dl and extract the IOM number qls 1 iom# * 2 lda iom_fault_vector,ql Get fault vector word als imu_bit_shift shift IMU bit to sign position tpl +3,ic If not IMU, skip setting of IMU bit ldq imu,du orsq bootload_info+7 save IMU flag in software region ldq bootload_info+1 Last PCW qrl 9-2 eax6 0,qu Tape channel number * 4 in X6. adlx6 bootload_info+2 Add in base of mailbox ldx5 bootload_info+2 Mailbox loc in X5 ldaq 0,x5 check status from first read cana status_mask-*,ic tnz boot_die-*,ic bad status ldq bootload_info+3 " get the IDCW anq =o007700,du " device number orsq data_idcw-*,ic " save it canq =o007700,du " boot from IOM or FIPS device zero? tze get_device-*,ic " yes stq device_hold-*,ic " save device# from IDCW llr 24+36 " get device# from status word anq =o007700,du " only device# please tze got_device-*,ic " = 00 in both places... cmpq device_hold-*,ic " are the two the same? tze got_device-*,ic " yes, everything ok lda device_mask-*,ic " no, get ready to zero device field ansa bootload_info+3 " first the bootload IDCW ansa data_idcw-*,ic " then the data IDCW orsq bootload_info+3 " now put in the right number orsq data_idcw-*,ic " ditto the data IDCW tra got_device-*,ic " now its ready get_device: llr 24+36 " get it from status word anq =o007700,du " device only tze got_device-*,ic " already zero, proceed orsq bootload_info+3 " save in IDCW (for bootload_io) tra got_device-*,ic iox_setup: decor adp <<<>>> inhibit on <-><-><-><-><-><-><-><-><-><-><-><-> lda =0,dl Mask interrupts limr ldt -1,du Prevent timer runout inhibit off <-><-><-><-><-><-><-><-><-><-><-><-> ldo or-*,ic " set option register camp2 " enable and clear the PTWAM stz bootload_info+7 " clear software region lda iox_lpw-*,ic sta iox_mailbox+7 eax6 iox_mailbox+7 eax5 iox_mailbox+8 " Mailbox loc in X5 ldaq 0,x5 " check status from first read cana status_mask-*,ic tnz boot_die-*,ic " bad status ldq bootload_info " get the IDCW anq =o007700,du " device number orsq data_idcw-*,ic " save it decor dps8 <<<>>> or whatever got_device: tsx2 chk_mpc_state-*,ic " is tape controller cold or warm? orsq bootload_info+7 " save cold boot flag in software region tsx2 rd_tape-*,ic " read eof record, and ignore status nop " ignore errors " tsx2 rd_tape-*,ic read in first real record tra boot_die-*,ic " error lda prb.data " less SLTE size ada 1,dl " and control word als 18 asa prb.prb_it " adjust address arl 12 neg 0 asa prb.prb_it " and tally lxl4 prb.prb_it,id " bound_bootload_0 control word next_record: lda prb.prb_it,id " get the next data word ttn read_more_data-*,ic sta data_it-my_zero+my_offset,id " store it eax4 -1,x4 " tally it off tpnz next_record-*,ic " we are done reading in bound_bootload_0 tra bbl0_absloc+2*TOE_HOLD_BOOT_ENTRY " tra through " toehold to bootload_abs_mode read_more_data: tsx2 rd_tape-*,ic " read another record tra boot_die-*,ic tra next_record-*,ic " keep copying " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " chk_mpc_state - subroutine to issue special connect to " tape channel to determine if intelligence is present. chk_mpc_state: szn system_type-*,ic tze 3,ic decor adp <<<>>> ldq 0,dl " indicate intelligence tra 0,x2 decor dps8 <<<>>> rscr 32 staq chk_io_time-*,ic " save start time eaa chk_idcw-*,ic " absolute address of DCW list. sta 0,x6 " set tape LPW. stz 0,x5 " clear status word. cioc bootload_info+1 " port # stuck in PCW lda 0,x5 " check for status tmi got_status-*,ic " status has arrived rscr 32 " nop, need to wait sbaq chk_io_time-*,ic cmpaq pause_time-*,ic tmi -5,ic " continue waiting " Timeout, tape controller must be wedged.. unwedge: lda =o070000,dl " reset and mask PCW bits orsa bootload_info " set bits in PCW eaa ignore_idcw-*,ic " absolute address of DCW list. sta 0,x6 " set tape LPW. stz 0,x5 " clear status word. cioc bootload_info+1 " port # stuck in PCW rscr 32 " small pause for reset/mask staq chk_io_time-*,ic rscr 32 sbaq chk_io_time-*,ic cmpaq pause_time-*,ic tmi -3,ic lda =o050000,dl " get mask and marker PCW bits ersa bootload_info " turn them off in the PCW ldq cold_tape_mpc,du " indicate no intelligence tra 0,x2 got_status: rscr 32 " small pause for IO interrupt cycle staq chk_io_time-*,ic rscr 32 sbaq chk_io_time-*,ic cmpaq pause_time-*,ic tmi -3,ic lda 0,x5 " get status word cana pof_mask-*,ic " check for power-off tnz unwedge-*,ic " yes, will need to unwedge ldq 0,dl " indicate intelligence tra 0,x2 make_idcw chk_idcw,TAPE.reset_device_status,0,nondata,terminate make_idcw ignore_idcw,TAPE.request_status,0,nondata,terminate pof_mask: oct 200000000000 even chk_io_time: bss ,2 pause_time: dec 0,1000000 " one second " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " rd_tape - subroutine to issue connect to tape channel " and wait for status word to be stored rd_tape: rscr 32 " get the time staq io_start_time-*,ic " and save it try_rd_again: eaa data_idcw-*,ic Absolute address of DCW list. sta 0,x6 Set tape LPW. stz 0,x5 Clear status word. lda bootload_info+4 iox a data szn system_type-*,ic tnz 3,ic decor dps8 <<<>>> cioc bootload_info+1 read next record (port # stuck in pcw) tra 2,ic decor adp <<<>>> cioc iox_mailbox decor dps8 <<<>>> odd lda 0,x5 tpl -1,ic Wait for it to happen. " IMU only does single presision stores, so after status word " arrives we need to wait for the second word to be stored... ldq =o1000,dl sblq 1,dl tnz -1,ic ldaq 0,x5 " should be there now!! cana status_mask-*,ic " error? tnz tape_error-*,ic " yes canq =o7777,dl " tally residue? tnz 0,x2 " yes, noise on the tape " check for valid record lda prb.mstrh+mstr_header.flags_word cana mstr_header.repeat,du " the only fatal flag. tnz boot_die-*,ic " yes " compute prb pointer ldq prb.mstrh+mstr_header.data_bits_used div 36,du " number of words in QL adq 1,dl " plus one qls 18-12 " in Q(18:29) adq prb.data,du " whole pointer stq prb.prb_it tra 1,x2 return to caller tape_error: ana =o770000,du " get just major/minor status cmpa =o600000,du " POF? tze retry_pof-*,ic " yes, try again tra 0,x2 " no, give up retry_pof: rscr 32 " get the time sbaq io_start_time-*,ic " rel-a-tize cmpaq ten_sec_limit-*,ic " is ten seconds up? tmi try_rd_again-*,ic " no, try one mo time tra 0,x2 " yes, give up " inhibit on <+><+><+><+><+><+><+><+><+><+><+><+> boot_die: dis 0 stop the machine tra -1,ic I said stop! inhibit off <-><-><-><-><-><-><-><-><-><-><-><-> make_idcw data_idcw,TAPE.read_binary_record,0,record,terminate make_ddcw data_dcw,prb.mstrh,mstr_header_size+1024+mstr_trailer_size, iotd data_it: vfd 18/bbl0_absloc,12/0,6/0 " indirect word for storing code mr: oct 000000000061 " enable history registers cmr: oct 000000000003 " disable cache, LUF in 16 ms. or: oct 300000000000 " LUF in 16 ms. status_mask: oct 370000770000 device_mask: oct 770077777777 iox_lpw: vfd 24/0,12o/3034 system_type: oct 0 " non zero is DPS88 (IOX) device_hold: oct 0 " temp holding area for # from IDCW even io_start_time: bss ,2 ten_sec_limit: dec 0,10000000 " ten seconds (in micros) " " If this program is bootloaded from tape by the IOM/IOX bootload program, " the IOM/IOX mailbox will get overwritten with the contents of this " tape record. It is imperative that the previous contents be restored. " It is the purpose of the following code to perform this restoration. equ_o iom_mbx_absloc,1200 equ_o iox_mailbox,1400 " IMW area org iom_mbx_absloc-my_offset bss ,128 macro status_mailboxes oct 0,0 for status storage or base addr 0, 1 oct 0,0 for system fault storage or base addr 2, 3 vfd 18o/777777,18/0 bound 0, 1 vfd 18/0,18/0 bound 2, 3 vfd 24/0,12o/3034 channel link word vfd 18o/&1+2,6/0,12/2 system fault DCW or iox lpw vfd 18/0,6o/04,12/0 connect LPW or iox status bss ,3 bss ,20 &end " status mbx's for IOM 0 status_mailboxes 1400 " channel mbx's for IOM 0 maclist off,save dup 56 payload channel mailboxes vfd 18/3,o6/02,12/3 LPW bss ,1 LPWX vfd 18o/1400,6/,12/0 SCW bss ,1 DCW dupend maclist restore " status mbx's for IOM 1 status_mailboxes 2000 " the channel mbx's for channels 8 and 9 get overwritten by the tape trailer " " " BEGIN MESSAGE DOCUMENTATION " " Message: " HALT with only the first MST tape record read. " " S: $crash " " T: $init " " M: If the high-order bit of the AQ register is on, the pattern in the AQ " register is the (bad) status returned by the IOM while reading a tape " record. If the high order bit is not on, the A register contains the " flags word from a MST header record indicating that this record is bad. " " A: Try booting on a different drive or with a different tape. " " END MESSAGE DOCUMENTATION end " " " ----------------------------------------------------------- " " " " Historical Background " " This edition of the Multics software materials and documentation is provided and donated " to Massachusetts Institute of Technology by Group Bull including Bull HN Information Systems Inc. " as a contribution to computer science knowledge. " This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, " Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell Bull Inc., Groupe Bull " and Bull HN Information Systems Inc. to the development of this operating system. " Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), " renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership " of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for " managing computer hardware properly and for executing programs. Many subsequent operating systems " incorporated Multics principles. " Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., " as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . " " ----------------------------------------------------------- " " Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without " fee is hereby granted,provided that the below copyright notice and historical background appear in all copies " and that both the copyright notice and historical background and this permission notice appear in supporting " documentation, and that the names of MIT, HIS, Bull or Bull HN not be used in advertising or publicity pertaining " to distribution of the programs without specific prior written permission. " Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. " Copyright 2006 by Bull HN Information Systems Inc. " Copyright 2006 by Bull SAS " All Rights Reserved " "