assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 1 copyright 1970 by honeywell information systems inc. 1 * *********************************************************** 2 * * * 3 * * copyright, (c) honeywell information systems inc., 1982 * 4 * * * 5 * * copyright (c) 1972 by massachusetts institute of * 6 * * technology and honeywell information systems, inc. * 7 * * * 8 * *********************************************************** 9 10 lbl gicb,gicb assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 2 copyright 1970 by honeywell information systems inc. 13 ************************************************************ 14 * 15 * note: cs means "central system" 16 * 17 ************************************************************ 18 * change list 19 * 20 * modified to run on dia by rbs june 24, 1972 21 * modified for multics boot of fnp by mjg may 25, 1976 22 * 23 ************************************************************ 24 pcc on print assembler control cards 25 pmc on print macro expansions 26 editp on print special edit control characters 27 abs assemble in absolute format 28 29 cksum macro checksum calculation macro 30 ldx3 2 get return address 31 tra cksum-* calculate checksum 32 ind * location of 'here' and 'now' 33 endm cksum 34 35 parity macro c,m dia parity calculation macro 36 ldx3 2 get location of dcw 37 tsy parity-* call parity calculation routine 38 ind #1 location of dia dcw 39 endm parity 40 00000 41 systm define system description symbols assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 3 datanet configuration description ttls datanet configuration description 000000 intv set 0 iom interrupt vector base address 000400 intc set 256 program interrupt cell base address 000420 fltst set 272 iom fault status base address 000440 fltv set 288 processor fault vector base address 000450 iomm set 296 iom mailbox base address *************************** * iom channel assignments * *************************** 000000 tych set 0 typewriter channel 000002 lpch set 2 line printer channel 000004 dich set 4 direct interface adaptor 000006 h1ch set 6 high speed line adapter number one 000007 h2ch set 7 high speed line adapter number two 000010 h3ch set 8 high speed line adapter number three 000011 l1ch set 9 low speed line adapter number one 000012 l2ch set 10 low speed line adapter number two 000013 l3ch set 11 low speed line adapter number three 000014 l4ch set 12 low speed line adapter number four 000015 l5ch set 13 low speed line adapter number five 000016 l6ch set 14 low speed line adapter number six 000077 tmch set 63 interval timer channel 000077 swch set 63 data switch channel assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 4 datanet configuration description eject ************************* * iom interrupt vectors * ************************* 000000 tyft set 0 typewriter fault 000001 tyrq set 1 typewriter request 000002 tytm set 2 typewriter terminate 000040 lpft set 32 line printer fault 000041 lpat set 33 line printer attention 000042 lptm set 34 line printer terminate 000100 dift set 64 dia fault 000102 ditm set 66 dia terminate 000003 dis0 set 3 dia special - 0 000023 dis1 set 19 dia special - 1 000043 dis2 set 35 dia special - 2 000063 dis3 set 51 dia special - 3 000103 dis4 set 67 dia special - 4 000123 dis5 set 83 dia special - 5 000143 dis6 set 99 dia special - 6 000163 dis7 set 115 dia special - 7 000203 dis8 set 131 dia special - 8 000223 dis9 set 147 dia special - 9 000243 dis10 set 163 dia special - 10 000263 dis11 set 179 dia special - 11 000303 dis12 set 195 dia special - 12 000323 dis13 set 211 dia special - 13 000343 dis14 set 227 dia special - 14 assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 5 datanet configuration description 000363 dis15 set 243 dia special - 15 000140 h1ft set 96 hsla 1 fault 000004 h1a0 set 4 hsla 1 subch 0 active terminate vector 000005 h1a16 set 5 hsla 1 subch 16 active terminate vector 000006 h1c0 set 6 hsla 1 subch 0 config terminate vector 000007 h1c16 set 7 hsla 1 subch 16 config terminate vector 000024 h1a1 set 20 hsla 1 subch 1 active terminate vector 000025 h1a17 set 21 hsla 1 subch 17 active terminate vector 000026 h1c1 set 22 hsla 1 subch 1 config terminate vector 000027 h1c17 set 23 hsla 1 subch 17 config terminate vector 000044 h1a2 set 36 hsla 1 subch 2 active terminate vector 000045 h1a18 set 37 hsla 1 subch 18 active terminate vector 000046 h1c2 set 38 hsla 1 subch 2 config terminate vector 000047 h1c18 set 39 hsla 1 subch 18 config terminate vector 000064 h1a3 set 52 hsla 1 subch 3 active terminate vector 000065 h1a19 set 53 hsla 1 subch 19 active terminate vector 000066 h1c3 set 54 hsla 1 subch 3 config terminate vector 000067 h1c19 set 55 hsla 1 subch 19 config terminate vector 000104 h1a4 set 68 hsla 1 subch 4 active terminate vector 000105 h1a20 set 69 hsla 1 subch 20 active terminate vector 000106 h1c4 set 70 hsla 1 subch 4 config terminate vector 000107 h1c20 set 71 hsla 1 subch 20 config terminate vector 000124 h1a5 set 84 hsla 1 subch 5 active terminate vector 000125 h1a21 set 85 hsla 1 subch 21 active terminate vector 000126 h1c5 set 86 hsla 1 subch 5 config terminate vector 000127 h1c21 set 87 hsla 1 subch 21 config terminate vector assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 6 datanet configuration description 000144 h1a6 set 100 hsla 1 subch 6 active terminate vector 000145 h1a22 set 101 hsla 1 subch 22 active terminate vector 000146 h1c6 set 102 hsla 1 subch 6 config terminate vector 000147 h1c22 set 103 hsla 1 subch 22 config terminate vector 000164 h1a7 set 116 hsla 1 subch 7 active terminate vector 000165 h1a23 set 117 hsla 1 subch 23 active terminate vector 000166 h1c7 set 118 hsla 1 subch 7 config terminate vector 000167 h1c23 set 119 hsla 1 subch 23 config terminate vector 000204 h1a8 set 132 hsla 1 subch 8 active terminate vector 000205 h1a24 set 133 hsla 1 subch 24 active terminate vector 000206 h1c8 set 134 hsla 1 subch 8 config terminate vector 000207 h1c24 set 135 hsla 1 subch 24 config terminate vector 000224 h1a9 set 148 hsla 1 subch 9 active terminate vector 000225 h1a25 set 149 hsla 1 subch 25 active terminate vector 000226 h1c9 set 150 hsla 1 subch 9 config terminate vector 000227 h1c25 set 151 hsla 1 subch 25 config terminate vector 000244 h1a10 set 164 hsla 1 subch 10 active terminate vector 000245 h1a26 set 165 hsla 1 subch 26 active terminate vector 000246 h1c10 set 166 hsla 1 subch 10 config terminate vector 000247 h1c26 set 167 hsla 1 subch 26 config terminate vector 000264 h1a11 set 180 hsla 1 subch 11 active terminate vector 000265 h1a27 set 181 hsla 1 subch 27 active terminate vector 000266 h1c11 set 182 hsla 1 subch 11 config terminate vector 000267 h1c27 set 183 hsla 1 subch 27 config terminate vector 000304 h1a12 set 196 hsla 1 subch 12 active terminate vector assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 7 datanet configuration description 000305 h1a28 set 197 hsla 1 subch 28 active terminate vector 000306 h1c12 set 198 hsla 1 subch 12 config terminate vector 000307 h1c28 set 199 hsla 1 subch 28 config terminate vector 000324 h1a13 set 212 hsla 1 subch 13 active terminate vector 000325 h1a29 set 213 hsla 1 subch 29 active terminate vector 000326 h1c13 set 214 hsla 1 subch 13 config terminate vector 000327 h1c29 set 215 hsla 1 subch 29 config terminate vector 000344 h1a14 set 228 hsla 1 subch 14 active terminate vector 000345 h1a30 set 229 hsla 1 subch 30 active terminate vector 000346 h1c14 set 230 hsla 1 subch 14 config terminate vector 000347 h1c30 set 231 hsla 1 subch 30 config terminate vector 000364 h1a15 set 244 hsla 1 subch 15 active terminate vector 000365 h1a31 set 245 hsla 1 subch 31 active terminate vector 000366 h1c15 set 246 hsla 1 subch 15 config terminate vector 000367 h1c31 set 247 hsla 1 subch 31 config terminate vector 000220 l1ft set 144 lsla 1 fault 000221 l1a set 145 lsla 1 active terminate vector 000222 l1c set 146 lsla 1 configuration terminate vector 000240 l2ft set 160 lsla 2 fault 000241 l2a set 161 lsla 2 active terminate vector 000242 l2c set 162 lsla 2 configuration terminate vector 000260 l3ft set 176 lsla 3 fault 000261 l3a set 177 lsla 3 active terminate vector 000262 l3c set 178 lsla 3 configuration terminate vector 000300 l4ft set 192 lsla 4 fault 000301 l4a set 193 lsla 4 active terminate vector assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 8 datanet configuration description 000302 l4c set 194 lsla 4 configuration terminate vector 000320 l5ft set 208 lsla 5 fault 000321 l5a set 209 lsla 5 active terminate vector 000322 l5c set 210 lsla 5 configuration terminate vector 000340 l6ft set 224 lsla 6 fault 000341 l6a set 225 lsla 6 active terminate vector 000342 l6c set 226 lsla 6 configuration terminate vector 000360 tmft set 240 timer channel fault 000361 tmro set 241 interval timer runout 000362 etr set 242 elapsed timer roll-over assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 9 datanet configuration description eject 1 *************************** * program interrupt cells * *************************** 000400 ilev0 set 256 level 0 (common peripheral fault) 000401 ilev1 set 257 level 1 (common peripheral req/attn) 000402 ilev2 set 258 level 2 (common peripheral terminate) 000403 ilev3 set 259 level 3 (dia special) 000404 ilev4 set 260 level 4 (hsla 1 subch 0-15 active) 000405 ilev5 set 261 level 5 (hsla 1 subch 16-31 active) 000406 ilev6 set 262 level 6 (hsla 1 subch 0-15 config) 000407 ilev7 set 263 level 7 (hsla 1 subch 16-31 config) 000410 ilev8 set 264 level 8 (hsla 2 subch 0-15 active) 000411 ilev9 set 265 level 9 (hsla 2 subch 16-31 active) 000412 ilev10 set 266 level 10 (hsla 2 subch 0-15 config) 000413 ilev11 set 267 level 11 (hsla 2 subch 16-31 config) 000414 ilev12 set 268 level 12 (hsla 3 subch 0-15 active) 000415 ilev13 set 269 level 13 (hsla 3 subch 16-31 active) 000416 ilev14 set 270 level 14 (hsla 3 subch 0-15 config) 000417 ilev15 set 271 level 15 (hsla 3 subch 16-31 config) ******************** * iom fault status * ******************** 000420 tyfts set 272 typewriter fault status word 000422 lpfts set 274 line printer fault status word 000424 difts set 276 dia fault status word 000426 h1fts set 278 hsla 1 fault status word 000427 h2fts set 279 hsla 2 fault status word assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 10 datanet configuration description 000430 h3fts set 280 hsla 3 fault status word 000431 l1fts set 281 lsla 1 fault status word 000432 l2fts set 282 lsla 2 fault status word 000433 l3fts set 283 lsla 3 fault status word 000434 l4fts set 284 lsla 4 fault status word 000435 l5fts set 285 lsla 5 fault status word 000436 l6fts set 286 lsla 6 fault status word 000437 tmfts set 287 timer fault status word *************************** * processor fault vectors * *************************** 000440 suflt set 288 startup fault 000441 sdflt set 289 shutdown fault 000442 parflt set 290 memory parity fault 000443 iopflt set 291 illegal operation fault 000444 ovflt set 292 overflow fault 000445 memflt set 293 illegal memory operation fault 000446 dvflt set 294 divide check fault 000447 ipiflt set 295 illegal program interrupt fault assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 11 datanet configuration description eject ************************************ * iom mailbox communication region * ************************************ 000450 itmb set 296 interval timer mailbox 000451 etmb set 297 elapsed timer mailbox 000454 dimb set 300 dia pcw mailbox 000456 dist set 302 dia status icw mailbox 000460 tyst set 304 typewriter status icw mailbox 000462 tyicw set 306 typewriter data icw mailbox 000470 lpst set 312 line printer status icw mailbox 000472 lpicw set 314 line printer data icw mailbox 000475 cptp set 317 cpu page table pointer 000476 yelcnt set 318 memory yellow counter (edac corected erro 000500 l1mb set 320 lsla 1 mailbox base address 000520 l2mb set 336 lsla 2 mailbox base address 000540 l3mb set 352 lsla 3 mailbox base address 000560 l4mb set 368 lsla 4 mailbox base address 000600 l5mb set 384 lsla 5 mailbox base address 000620 l6mb set 400 lsla 6 mailbox base address 001000 h1mb set 512 hsla 1 mailbox base address 002000 h2mb set 1024 hsla 2 mailbox base address 003000 h3mb set 1536 hsla 3 mailbox base address 002000 .end. set 1024 end of iom mailbox communication region 00000 42 comreg assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 12 system communications region ttls system communications region ********************************** * system communication region * ********************************** 000640 .crldt set 416 date and time of binding 000644 .crbdt set 420 date and time of bootloading 000650 .crbuf set 424 starting address of buffer area 000651 .crmem set 425 last location of memory 000652 .crnbf set 426 number of buffers available 000653 .criom set 427 start of iom table 000654 .crnhs set 428 number of hsla's configured 000655 .crnls set 429 number of lsla's configured 000656 .crcon set 430 console enabled flag 000657 .crmod set 431 starting address of module chain 000660 .crnxa set 432 ptr to next avaliable buffer 000661 .crtra set 433 trace entry enable mask 000662 .crtrb set 434 base address of trace table 000663 .crtrc set 435 next available location in trace table 000664 .crreg set 436 disaster fault register storage location 000665 .crttb set 437 location of tib table 000666 .crtte set 438 location of end of tib table 000667 .crdly set 439 head of delay table chain 000670 .crver set 440 mcs version number, 4 chars 000672 .crbrk set 442 addr of breakpoint control table 000673 .crtsw set 443 if non-zero, tracing will cease 000674 .crnxs set 444 next free small block 000675 .crnbs set 445 number of buffers devoted to small space assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 13 system communications region 000676 .crcct set 446 address of first cct descriptor 000677 .crskd set 447 address of scheduler data block 000700 .cretb set 448 list of echo-negotiation bit tables 000701 .crcpt set 449 address of cpu page table 000702 .crpte set 450 address of variable cpu page table entry 000703 .crtsz set 451 size of trace data buffer 000704 .crmet set 452 non-zero if metering enabled 000705 .crtdt set 453 address of tib for t&d executive channel 000706 .crbtm set 454 address of time meters for getbuf/frebuf 000760 .crcpr set 496 copyright notice assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 14 intercomputer symbol definitions 43 ttls intercomputer symbol definitions 44 45 dia icw symbol definitions 46 000000 47 csadd equ 0 cs store address 000001 48 intopc equ 1 interrupt cell and op-code 000002 49 fnpadd equ 2 fnp address (36 bit data transfer) 000003 50 tally equ 3 tally (36 bit words) 51 52 dia operation code symbol definitions 53 000065 54 diatrg bool 65 transfer gate from cs to fnp 000070 55 diadis bool 70 disconnect 000071 56 diainf bool 71 interrupt fnp 000072 57 diajmp bool 72 jump 000073 58 diainc bool 73 interrupt cs 000074 59 diardc bool 74 read configuration switches 000075 60 diaftc bool 75 data transfer from fnp to cs 000076 61 diactf bool 76 data transfer from cs to fnp 000077 62 diawrp bool 77 wraparound assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 15 datanet fnp hardware communication region 63 ttls datanet fnp hardware communication region 64 65 i n t e r r u p t v e c t o r s 66 67 68 channel 00 interrupt vectors 69 00000 100002 70 vfd 3/w.2,15/*+2 bootload list icw 00001 060002 71 vfd 3/0,1/1,1/1,13/2 00002 0 00000 72 zero 00003 000070 73 vfd 18/diadis disconnect dcw 00004 1 00000 74 zero 0,w.2 with 36 bit xfer mode 00005 0 00000 75 zero 00006 76 dup 1,10 00006 0 00736 77 ind .rtrn. spring loaded interrupt vector 00007 0 00736 ind .rtrn. spring loaded interrupt vector 00010 0 00736 ind .rtrn. spring loaded interrupt vector 00011 0 00736 ind .rtrn. spring loaded interrupt vector 00012 0 00736 ind .rtrn. spring loaded interrupt vector 00013 0 00736 ind .rtrn. spring loaded interrupt vector 00014 0 00736 ind .rtrn. spring loaded interrupt vector 00015 0 00736 ind .rtrn. spring loaded interrupt vector 00016 0 00736 ind .rtrn. spring loaded interrupt vector 00017 0 00736 ind .rtrn. spring loaded interrupt vector 78 79 channel 01 interrupt vectors 80 00020 0 00722 81 ind .icft. iom fault vector 00021 82 dup 1,15 00021 0 00736 83 ind .rtrn. spring loaded interrupt vector 00022 0 00736 ind .rtrn. spring loaded interrupt vector 00023 0 00736 ind .rtrn. spring loaded interrupt vector 00024 0 00736 ind .rtrn. spring loaded interrupt vector 00025 0 00736 ind .rtrn. spring loaded interrupt vector 00026 0 00736 ind .rtrn. spring loaded interrupt vector 00027 0 00736 ind .rtrn. spring loaded interrupt vector 00030 0 00736 ind .rtrn. spring loaded interrupt vector 00031 0 00736 ind .rtrn. spring loaded interrupt vector 00032 0 00736 ind .rtrn. spring loaded interrupt vector 00033 0 00736 ind .rtrn. spring loaded interrupt vector 00034 0 00736 ind .rtrn. spring loaded interrupt vector 00035 0 00736 ind .rtrn. spring loaded interrupt vector 00036 0 00736 ind .rtrn. spring loaded interrupt vector 00037 0 00736 ind .rtrn. spring loaded interrupt vector 84 85 channel 02 interrupt vectors 86 00040 0 00722 87 ind .icft. iom fault vector 00041 88 dup 1,15 00041 0 00736 89 ind .rtrn. spring loaded interrupt vector 00042 0 00736 ind .rtrn. spring loaded interrupt vector assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 16 datanet fnp hardware communication region 00043 0 00736 ind .rtrn. spring loaded interrupt vector 00044 0 00736 ind .rtrn. spring loaded interrupt vector 00045 0 00736 ind .rtrn. spring loaded interrupt vector 00046 0 00736 ind .rtrn. spring loaded interrupt vector 00047 0 00736 ind .rtrn. spring loaded interrupt vector 00050 0 00736 ind .rtrn. spring loaded interrupt vector 00051 0 00736 ind .rtrn. spring loaded interrupt vector 00052 0 00736 ind .rtrn. spring loaded interrupt vector 00053 0 00736 ind .rtrn. spring loaded interrupt vector end of binary card gicb0001 00054 0 00736 ind .rtrn. spring loaded interrupt vector 00055 0 00736 ind .rtrn. spring loaded interrupt vector 00056 0 00736 ind .rtrn. spring loaded interrupt vector 00057 0 00736 ind .rtrn. spring loaded interrupt vector 90 91 channel 03 interrupt vectors 92 00060 0 00722 93 ind .icft. iom fault vector 00061 94 dup 1,15 00061 0 00736 95 ind .rtrn. spring loaded interrupt vector 00062 0 00736 ind .rtrn. spring loaded interrupt vector 00063 0 00736 ind .rtrn. spring loaded interrupt vector 00064 0 00736 ind .rtrn. spring loaded interrupt vector 00065 0 00736 ind .rtrn. spring loaded interrupt vector 00066 0 00736 ind .rtrn. spring loaded interrupt vector 00067 0 00736 ind .rtrn. spring loaded interrupt vector 00070 0 00736 ind .rtrn. spring loaded interrupt vector 00071 0 00736 ind .rtrn. spring loaded interrupt vector 00072 0 00736 ind .rtrn. spring loaded interrupt vector 00073 0 00736 ind .rtrn. spring loaded interrupt vector 00074 0 00736 ind .rtrn. spring loaded interrupt vector 00075 0 00736 ind .rtrn. spring loaded interrupt vector 00076 0 00736 ind .rtrn. spring loaded interrupt vector 00077 0 00736 ind .rtrn. spring loaded interrupt vector 96 97 channel 04 interrupt vectors 98 00100 0 00722 99 ind .icft. iom fault vector 00101 0 00736 100 ind .rtrn. spring loaded interrupt vector 00102 0 01000 101 ind .icbt. entry to bootload program 00103 102 dup 1,13 00103 0 00736 103 ind .rtrn. spring loaded interrupt vector 00104 0 00736 ind .rtrn. spring loaded interrupt vector 00105 0 00736 ind .rtrn. spring loaded interrupt vector 00106 0 00736 ind .rtrn. spring loaded interrupt vector 00107 0 00736 ind .rtrn. spring loaded interrupt vector 00110 0 00736 ind .rtrn. spring loaded interrupt vector 00111 0 00736 ind .rtrn. spring loaded interrupt vector 00112 0 00736 ind .rtrn. spring loaded interrupt vector 00113 0 00736 ind .rtrn. spring loaded interrupt vector 00114 0 00736 ind .rtrn. spring loaded interrupt vector assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 17 datanet fnp hardware communication region 00115 0 00736 ind .rtrn. spring loaded interrupt vector 00116 0 00736 ind .rtrn. spring loaded interrupt vector 00117 0 00736 ind .rtrn. spring loaded interrupt vector 104 105 channel 05 interrupt vectors 106 00120 0 00722 107 ind .icft. iom fault vector 00121 108 dup 1,15 00121 0 00736 109 ind .rtrn. spring loaded interrupt vector 00122 0 00736 ind .rtrn. spring loaded interrupt vector 00123 0 00736 ind .rtrn. spring loaded interrupt vector 00124 0 00736 ind .rtrn. spring loaded interrupt vector 00125 0 00736 ind .rtrn. spring loaded interrupt vector 00126 0 00736 ind .rtrn. spring loaded interrupt vector 00127 0 00736 ind .rtrn. spring loaded interrupt vector end of binary card gicb0002 00130 0 00736 ind .rtrn. spring loaded interrupt vector 00131 0 00736 ind .rtrn. spring loaded interrupt vector 00132 0 00736 ind .rtrn. spring loaded interrupt vector 00133 0 00736 ind .rtrn. spring loaded interrupt vector 00134 0 00736 ind .rtrn. spring loaded interrupt vector 00135 0 00736 ind .rtrn. spring loaded interrupt vector 00136 0 00736 ind .rtrn. spring loaded interrupt vector 00137 0 00736 ind .rtrn. spring loaded interrupt vector 110 111 channel 06 interrupt vectors 112 00140 0 00722 113 ind .icft. iom fault vector 00141 114 dup 1,15 00141 0 00736 115 ind .rtrn. spring loaded interrupt vector 00142 0 00736 ind .rtrn. spring loaded interrupt vector 00143 0 00736 ind .rtrn. spring loaded interrupt vector 00144 0 00736 ind .rtrn. spring loaded interrupt vector 00145 0 00736 ind .rtrn. spring loaded interrupt vector 00146 0 00736 ind .rtrn. spring loaded interrupt vector 00147 0 00736 ind .rtrn. spring loaded interrupt vector 00150 0 00736 ind .rtrn. spring loaded interrupt vector 00151 0 00736 ind .rtrn. spring loaded interrupt vector 00152 0 00736 ind .rtrn. spring loaded interrupt vector 00153 0 00736 ind .rtrn. spring loaded interrupt vector 00154 0 00736 ind .rtrn. spring loaded interrupt vector 00155 0 00736 ind .rtrn. spring loaded interrupt vector 00156 0 00736 ind .rtrn. spring loaded interrupt vector 00157 0 00736 ind .rtrn. spring loaded interrupt vector 116 117 channel 07 interrupt vectors 118 00160 0 00722 119 ind .icft. iom fault vector 00161 120 dup 1,15 00161 0 00736 121 ind .rtrn. spring loaded interrupt vector 00162 0 00736 ind .rtrn. spring loaded interrupt vector assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 18 datanet fnp hardware communication region 00163 0 00736 ind .rtrn. spring loaded interrupt vector 00164 0 00736 ind .rtrn. spring loaded interrupt vector 00165 0 00736 ind .rtrn. spring loaded interrupt vector 00166 0 00736 ind .rtrn. spring loaded interrupt vector 00167 0 00736 ind .rtrn. spring loaded interrupt vector 00170 0 00736 ind .rtrn. spring loaded interrupt vector 00171 0 00736 ind .rtrn. spring loaded interrupt vector 00172 0 00736 ind .rtrn. spring loaded interrupt vector 00173 0 00736 ind .rtrn. spring loaded interrupt vector 00174 0 00736 ind .rtrn. spring loaded interrupt vector 00175 0 00736 ind .rtrn. spring loaded interrupt vector 00176 0 00736 ind .rtrn. spring loaded interrupt vector 00177 0 00736 ind .rtrn. spring loaded interrupt vector 122 123 channel 08 interrupt vectors 124 00200 0 00722 125 ind .icft. iom fault vector 00201 126 dup 1,15 00201 0 00736 127 ind .rtrn. spring loaded interrupt vector 00202 0 00736 ind .rtrn. spring loaded interrupt vector 00203 0 00736 ind .rtrn. spring loaded interrupt vector end of binary card gicb0003 00204 0 00736 ind .rtrn. spring loaded interrupt vector 00205 0 00736 ind .rtrn. spring loaded interrupt vector 00206 0 00736 ind .rtrn. spring loaded interrupt vector 00207 0 00736 ind .rtrn. spring loaded interrupt vector 00210 0 00736 ind .rtrn. spring loaded interrupt vector 00211 0 00736 ind .rtrn. spring loaded interrupt vector 00212 0 00736 ind .rtrn. spring loaded interrupt vector 00213 0 00736 ind .rtrn. spring loaded interrupt vector 00214 0 00736 ind .rtrn. spring loaded interrupt vector 00215 0 00736 ind .rtrn. spring loaded interrupt vector 00216 0 00736 ind .rtrn. spring loaded interrupt vector 00217 0 00736 ind .rtrn. spring loaded interrupt vector 128 129 channel 09 interrupt vectors 130 00220 0 00722 131 ind .icft. iom fault vector 00221 132 dup 1,15 00221 0 00736 133 ind .rtrn. spring loaded interrupt vector 00222 0 00736 ind .rtrn. spring loaded interrupt vector 00223 0 00736 ind .rtrn. spring loaded interrupt vector 00224 0 00736 ind .rtrn. spring loaded interrupt vector 00225 0 00736 ind .rtrn. spring loaded interrupt vector 00226 0 00736 ind .rtrn. spring loaded interrupt vector 00227 0 00736 ind .rtrn. spring loaded interrupt vector 00230 0 00736 ind .rtrn. spring loaded interrupt vector 00231 0 00736 ind .rtrn. spring loaded interrupt vector 00232 0 00736 ind .rtrn. spring loaded interrupt vector 00233 0 00736 ind .rtrn. spring loaded interrupt vector 00234 0 00736 ind .rtrn. spring loaded interrupt vector assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 19 datanet fnp hardware communication region 00235 0 00736 ind .rtrn. spring loaded interrupt vector 00236 0 00736 ind .rtrn. spring loaded interrupt vector 00237 0 00736 ind .rtrn. spring loaded interrupt vector 134 135 channel 10 interrupt vectors 136 00240 0 00722 137 ind .icft. iom fault vector 00241 138 dup 1,15 00241 0 00736 139 ind .rtrn. spring loaded interrupt vector 00242 0 00736 ind .rtrn. spring loaded interrupt vector 00243 0 00736 ind .rtrn. spring loaded interrupt vector 00244 0 00736 ind .rtrn. spring loaded interrupt vector 00245 0 00736 ind .rtrn. spring loaded interrupt vector 00246 0 00736 ind .rtrn. spring loaded interrupt vector 00247 0 00736 ind .rtrn. spring loaded interrupt vector 00250 0 00736 ind .rtrn. spring loaded interrupt vector 00251 0 00736 ind .rtrn. spring loaded interrupt vector 00252 0 00736 ind .rtrn. spring loaded interrupt vector 00253 0 00736 ind .rtrn. spring loaded interrupt vector 00254 0 00736 ind .rtrn. spring loaded interrupt vector 00255 0 00736 ind .rtrn. spring loaded interrupt vector 00256 0 00736 ind .rtrn. spring loaded interrupt vector 00257 0 00736 ind .rtrn. spring loaded interrupt vector 140 141 channel 11 interrupt vectors 142 end of binary card gicb0004 00260 0 00722 143 ind .icft. iom fault vector 00261 144 dup 1,15 00261 0 00736 145 ind .rtrn. spring loaded interrupt vector 00262 0 00736 ind .rtrn. spring loaded interrupt vector 00263 0 00736 ind .rtrn. spring loaded interrupt vector 00264 0 00736 ind .rtrn. spring loaded interrupt vector 00265 0 00736 ind .rtrn. spring loaded interrupt vector 00266 0 00736 ind .rtrn. spring loaded interrupt vector 00267 0 00736 ind .rtrn. spring loaded interrupt vector 00270 0 00736 ind .rtrn. spring loaded interrupt vector 00271 0 00736 ind .rtrn. spring loaded interrupt vector 00272 0 00736 ind .rtrn. spring loaded interrupt vector 00273 0 00736 ind .rtrn. spring loaded interrupt vector 00274 0 00736 ind .rtrn. spring loaded interrupt vector 00275 0 00736 ind .rtrn. spring loaded interrupt vector 00276 0 00736 ind .rtrn. spring loaded interrupt vector 00277 0 00736 ind .rtrn. spring loaded interrupt vector 146 147 channel 12 interrupt vectors 148 00300 0 00722 149 ind .icft. iom fault vector 00301 150 dup 1,15 00301 0 00736 151 ind .rtrn. spring loaded interrupt vector 00302 0 00736 ind .rtrn. spring loaded interrupt vector assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 20 datanet fnp hardware communication region 00303 0 00736 ind .rtrn. spring loaded interrupt vector 00304 0 00736 ind .rtrn. spring loaded interrupt vector 00305 0 00736 ind .rtrn. spring loaded interrupt vector 00306 0 00736 ind .rtrn. spring loaded interrupt vector 00307 0 00736 ind .rtrn. spring loaded interrupt vector 00310 0 00736 ind .rtrn. spring loaded interrupt vector 00311 0 00736 ind .rtrn. spring loaded interrupt vector 00312 0 00736 ind .rtrn. spring loaded interrupt vector 00313 0 00736 ind .rtrn. spring loaded interrupt vector 00314 0 00736 ind .rtrn. spring loaded interrupt vector 00315 0 00736 ind .rtrn. spring loaded interrupt vector 00316 0 00736 ind .rtrn. spring loaded interrupt vector 00317 0 00736 ind .rtrn. spring loaded interrupt vector 152 153 channel 13 interrupt vectors 154 00320 0 00722 155 ind .icft. iom fault vector 00321 156 dup 1,15 00321 0 00736 157 ind .rtrn. spring loaded interrupt vector 00322 0 00736 ind .rtrn. spring loaded interrupt vector 00323 0 00736 ind .rtrn. spring loaded interrupt vector 00324 0 00736 ind .rtrn. spring loaded interrupt vector 00325 0 00736 ind .rtrn. spring loaded interrupt vector 00326 0 00736 ind .rtrn. spring loaded interrupt vector 00327 0 00736 ind .rtrn. spring loaded interrupt vector 00330 0 00736 ind .rtrn. spring loaded interrupt vector 00331 0 00736 ind .rtrn. spring loaded interrupt vector 00332 0 00736 ind .rtrn. spring loaded interrupt vector 00333 0 00736 ind .rtrn. spring loaded interrupt vector end of binary card gicb0005 00334 0 00736 ind .rtrn. spring loaded interrupt vector 00335 0 00736 ind .rtrn. spring loaded interrupt vector 00336 0 00736 ind .rtrn. spring loaded interrupt vector 00337 0 00736 ind .rtrn. spring loaded interrupt vector 158 159 channel 14 interrupt vectors 160 00340 0 00722 161 ind .icft. iom fault vector 00341 162 dup 1,15 00341 0 00736 163 ind .rtrn. spring loaded interrupt vector 00342 0 00736 ind .rtrn. spring loaded interrupt vector 00343 0 00736 ind .rtrn. spring loaded interrupt vector 00344 0 00736 ind .rtrn. spring loaded interrupt vector 00345 0 00736 ind .rtrn. spring loaded interrupt vector 00346 0 00736 ind .rtrn. spring loaded interrupt vector 00347 0 00736 ind .rtrn. spring loaded interrupt vector 00350 0 00736 ind .rtrn. spring loaded interrupt vector 00351 0 00736 ind .rtrn. spring loaded interrupt vector 00352 0 00736 ind .rtrn. spring loaded interrupt vector 00353 0 00736 ind .rtrn. spring loaded interrupt vector 00354 0 00736 ind .rtrn. spring loaded interrupt vector assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 21 datanet fnp hardware communication region 00355 0 00736 ind .rtrn. spring loaded interrupt vector 00356 0 00736 ind .rtrn. spring loaded interrupt vector 00357 0 00736 ind .rtrn. spring loaded interrupt vector 164 165 channel 15 interrupt vectors 166 00360 0 00722 167 ind .icft. iom fault vector 00361 168 dup 1,15 00361 0 00736 169 ind .rtrn. spring loaded interrupt vector 00362 0 00736 ind .rtrn. spring loaded interrupt vector 00363 0 00736 ind .rtrn. spring loaded interrupt vector 00364 0 00736 ind .rtrn. spring loaded interrupt vector 00365 0 00736 ind .rtrn. spring loaded interrupt vector 00366 0 00736 ind .rtrn. spring loaded interrupt vector 00367 0 00736 ind .rtrn. spring loaded interrupt vector 00370 0 00736 ind .rtrn. spring loaded interrupt vector 00371 0 00736 ind .rtrn. spring loaded interrupt vector 00372 0 00736 ind .rtrn. spring loaded interrupt vector 00373 0 00736 ind .rtrn. spring loaded interrupt vector 00374 0 00736 ind .rtrn. spring loaded interrupt vector 00375 0 00736 ind .rtrn. spring loaded interrupt vector 00376 0 00736 ind .rtrn. spring loaded interrupt vector 00377 0 00736 ind .rtrn. spring loaded interrupt vector assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 22 datanet fnp hardware communication region 170 eject 171 172 i n t e r r u p t c e l l s 173 00400 000000 174 dec 0 level 0 00401 000000 175 dec 0 level 1 00402 000000 176 dec 0 level 2 00403 000000 177 dec 0 level 3 00404 000000 178 dec 0 level 4 00405 000000 179 dec 0 level 5 00406 000000 180 dec 0 level 6 00407 000000 181 dec 0 level 7 end of binary card gicb0006 00410 000000 182 dec 0 level 8 00411 000000 183 dec 0 level 9 00412 000000 184 dec 0 level 10 00413 000000 185 dec 0 level 11 00414 000000 186 dec 0 level 12 00415 000000 187 dec 0 level 13 00416 000000 188 dec 0 level 14 00417 000000 189 dec 0 level 15 190 191 i o m f a u l t s t a t u s 192 00420 000000 193 dec 0 channel 0 00421 000000 194 dec 0 channel 1 00422 000000 195 dec 0 channel 2 00423 000000 196 dec 0 channel 3 00424 000000 197 dec 0 channel 4 00425 000000 198 dec 0 channel 5 00426 000000 199 dec 0 channel 6 00427 000000 200 dec 0 channel 7 00430 000000 201 dec 0 channel 8 00431 000000 202 dec 0 channel 9 00432 000000 203 dec 0 channel 10 00433 000000 204 dec 0 channel 11 00434 000000 205 dec 0 channel 12 00435 000000 206 dec 0 channel 13 00436 000000 207 dec 0 channel 14 00437 000000 208 dec 0 channel 15 assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 23 datanet fnp hardware communication region 209 eject 210 211 p r o c e s s o r f a u l t v e c t o r s 212 00440 0 00725 213 ind .falt. startup fault 00441 0 00725 214 ind .falt. shutdown fault 00442 0 00725 215 ind .falt. memory parity fault 00443 0 00725 216 ind .falt. illegal operation code fault 00444 0 00725 217 ind .falt. overflow fault 00445 0 00725 218 ind .falt. illegal memory operation fault 00446 0 00725 219 ind .falt. divide check fault 00447 0 00725 220 ind .falt. illegal program interrupt fault 221 222 i o m m a i l b o x c o m m r e g i o n 223 00450 000000 224 dec 0 interval timer mailbox 00451 000000 225 dec 0 elapsed timer mailbox 00452 000000 226 diaind dec 0 indicator storage area for checksum 00453 000000 227 dec 0 00454 228 even 00454 000000 229 diasts dec 0,0 bootload dia status storage area 00455 000000 00456 100454 230 vfd 3/w.2,15/diasts dia status icw 00457 030002 231 vfd 3/0,1/0,1/1,1/1,12/2 assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 24 load mcs/fnp system 232 ttls load mcs/fnp system 233 00460 234 icbt10 null 00460 0 04 260 740 235 ldaq iclist-* get list icw for mcs load 00461 0 43 202 663 236 ldx1 l.trm2-* set where to go after loading mcs/fnp 00462 0 71 112 574 237 tra diaioc-* initiate mcs/fnp loading 00463 0 00000 238 .trm2 ind ** 239 240 check dia status from mcs/fnp read 241 end of binary card gicb0007 00464 0 47 771 455 242 ldq diasts+1-* check second status word 00465 0 64 046 533 243 tnz icgtsr-* bad status - e r r o r 244 245 compute checksum 246 00466 0 07 305 773 247 lda iclmts+1-* calculate length of mcs 00467 0 26 303 772 248 sba iclmts-* * 00470 4332 00 249 cax1 move to index one 00471 0 44 161 652 250 ldi icindc-* reset indicator storage 00472 0 54 760 452 251 sti diaind-* * 00473 0 71 005 500 252 tra 5 branch around zeroes 253 00474 000000 254 dec 0 two words of zeroes that must be at loc 00475 000000 255 dec 0 474 & 475 so that pager won't be activated 00476 000000 256 dec 0 476-477 is dn6670 'yellow' counter and is 00477 000000 257 dec 0 incremented by one for each edac error 258 00500 0 03 166 666 259 ldx2 lmcs2-* get starting location plus two 00501 0 04 277 1000 260 ldaq .mcs.-* get first two words 00502 173 776 261 iacx1 -2 reduce length 00503 262 cksum calculate checksum for mcs/fnp 00503 0 41 002 505 ldx3 2 00504 0 71 057 563 tra cksum-* 00505 0 00505 ind * 00506 0 24 266 774 263 sbaq icksma-* compare cksum to that made by cs system 00507 0 64 026 535 264 tnz icgtcr-* ***checksum error*** assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 25 load mcs/fnp system 265 eject 266 267 move mcs/fnp system into position 268 00510 0 07 263 773 269 lda iclmts+1-* calculate end of mcs code 00511 0 06 154 665 270 ada lmcs-* * 00512 0332 00 271 cax2 move to index two 00513 0 17 166 701 272 sta .mov1a-* store start of .mov1 code 00514 0 43 166 702 273 ldx1 s.mov-* get beginning of move code 274 00515 1 07 000 275 icbt40 lda 0,1 move 00516 2 17 000 276 sta 0,2 the 00517 173 001 277 iacx1 1 move 00520 273 001 278 iacx2 1 code 00521 0 76 162 703 279 aos l.mov-* reduce counter 00522 0 64 773 515 280 tnz icbt40-* not done, continue 281 00523 0 07 244 767 282 lda icintn-* get execute interrupt cell number 00524 2337 03 283 arl 3 shift off emergency int cell no. 00525 0336 14 284 als 12 position number 00526 0 37 240 766 285 ora dimbx-* add in mailbox base address 00527 4333 00 286 cax3 move to index three 00530 0 03 242 772 287 ldx2 iclmts-* get the start of mcs 00531 0 43 134 665 288 ldx1 lmcs-* get where it is right now 00532 4 71 147 701 289 tra .mov1a-*,* enter move one routine assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 26 load mcs/fnp system 290 eject 291 292 send unsuccessful bootload status to cs system 293 00533 294 icgtsr null dia status error when reading mcs 00533 0 07 126 661 295 lda .ssts2-* set to store status error status 00534 0 71 006 542 296 tra icbt50-* 00535 297 icgtcr null checksum error on mcs data 00535 0 07 123 660 298 lda .ssts1-* set to store checksum error status 00536 473 000 299 ilq 0 clear the q 00537 0 71 003 542 300 tra icbt50-* 00540 301 dianfr null dia configuration error end of binary card gicb0008 00540 0 37 122 662 302 ora .ssts3-* set to store configuration error status 00541 0 56 106 647 303 stz icepc-* no exception processing for this one 00542 304 icbt50 null 00542 0 76 105 647 305 aos icepc-* reduce exception processing counter 00543 0 75 715 460 306 tmi icbt10-* dont give up yet, reissue command 00544 0 14 112 656 307 staq .sstat-* store status to be sent to cs 00545 0 07 221 766 308 lda dimbx-* calculate location of bootload status 00546 773 006 309 iaa 6 add offset of bootload status area 00547 0 17 063 632 310 sta stdcw1-* store in data transfer dcw 00550 0 07 217 767 311 lda icintn-* get execute interrupt cell to set 00551 2337 03 312 arl 3 shift off emergency int cell no. 00552 0336 06 313 als 6 position cell number 00553 0 72 064 637 314 orsa stdcw2+1-* store in interrupt dcw 00554 0 43 072 646 315 ldx1 lstsls-* get length of status dcw block 00555 316 parity stslst calculate parity for status dcw's 00555 0 41 002 557 ldx3 2 get location of dcw 00556 0 10 033 611 tsy parity-* call parity calculation routine 00557 0 00630 ind stslst location of dia dcw 00560 0 04 050 630 317 ldaq stslst-* get list icw for status store 00561 0 43 103 664 318 ldx1 l.trm3-* set where to go after storing status 00562 0 71 012 574 319 tra diaioc-* store bad status of the bootload assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 27 load mcs/fnp system 320 eject 321 322 checksum calculation routine 323 00563 324 cksum null 00563 0 44 667 452 325 ldi diaind-* get the indicators 00564 0 45 002 566 326 tnc 2 test for carry 00565 0 15 063 650 327 adaq diary-* carry. simulate awc instruction 00566 2 15 000 328 adaq 0,2 add in next word 00567 0 54 663 452 329 sti diaind-* save indicators 00570 273 002 330 iacx2 2 bump data pointer 00571 173 776 331 iacx1 -2 reduce counter 00572 0 64 771 563 332 tnz cksum-* continue to end of block 00573 3 71 001 333 tra 1,3 return 334 335 initiate i/o on dia channel 336 00574 0 14 656 452 337 diaioc staq list-* set list icw mailbox 00575 0 07 072 667 338 lda dialst-* get pointer to list icw 00576 473 070 339 ilq 56 get command of 70 for pcw 00577 0 14 655 454 340 staq dimb-* store in pcw mailbox 00600 4 53 053 653 341 stx1 lditm-*,* set terminate vector 00601 673 002 342 ila 2 set word count for parity check 00602 4332 00 343 cax1 * 00603 344 parity dimb calculate dia parity for pcw mailbox 00603 0 41 002 605 ldx3 2 get location of dcw 00604 0 10 005 611 tsy parity-* call parity calculation routine 00605 0 00454 ind dimb location of dia dcw 00606 0 60 646 454 345 cioc dimb-* initiate i/o in dia channel 00607 4331 00 346 dis wait for interrupt 00610 0 71 777 607 347 tra -1 * 348 349 calculate dia parity 350 00611 0 00000 351 parity ind ** return address 00612 3 47 000 352 ldq 0,3 get first word of dcw 00613 3 07 001 353 lda 1,3 get second word of dcw end of binary card gicb0009 00614 7336 22 354 qlp 18 calculate parity for 1st word 00615 0 64 002 617 355 tnz 2 odd parity... 00616 0 37 036 654 356 ora parwd1-* even - set parity bit 00617 3336 22 357 alp 18 calculate parity for 2nd word 00620 0 64 002 622 358 tnz 2 odd parity... 00621 0 37 034 655 359 ora parwd2-* even - set parity bit 00622 3 17 001 360 sta 1,3 restore second word with parity bits 00623 373 002 361 iacx3 2 bump pointer to next pair of words 00624 173 776 362 iacx1 -2 decrement word count 00625 0 64 765 612 363 tnz parity+1-* more to do 00626 0 76 763 611 364 aos parity-* increment return pointer 00627 4 71 762 611 365 tra parity-*,* and return assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 28 constants and buffers 366 ttls constants and buffers 367 000452 368 list equ 298 list icw storage 369 00630 1 00632 370 stslst dcw stdcw1,6 send bootload status list icw 00631 000006 00632 000000 371 stdcw1 vfd 18/,18/diaftc data transfer fnp to cs dcw 00633 000075 00634 1 00656 372 dcw .sstat,1 00635 000001 00636 000000 373 stdcw2 vfd 18/,18/diainc interrupt cs dcw 00637 000073 00640 1 00000 374 zero 0,w.2 00641 0 00000 375 zero 00642 000000 376 vfd 18/,18/diadis disconnect dcw 00643 000070 00644 1 00000 377 zero 0,w.2 00645 0 00000 378 zero 00646 0 00016 379 lstsls ind *-stslst length of status dcw block 380 00647 777775 381 icepc dec -3 exception processing counter 382 00650 383 even 00650 000000 384 diary dec 0,1 cksum carry constant 00651 000001 00652 024004 385 icindc oct 024004 indicator register constant 00653 0 00102 386 lditm ind ditm location of dia terminate vector 387 00654 040000 388 parwd1 oct 040000 parity bit for 1st word of dia dcw 00655 020000 389 parwd2 oct 020000 parity bit for 2nd word of dia dcw 390 00656 391 even 00656 400000 392 .sstat oct 400000,000000 status for successful bootload 00657 000000 00660 410000 393 .ssts1 oct 410000 status for checksum error on bootload 00661 420000 394 .ssts2 oct 420000 status for bad status on bootload 00662 430000 395 .ssts3 oct 430000 status for configuration error 396 00663 0 00463 397 l.trm2 ind .trm2 terminate vector when reading mcs/fnp 00664 0 00733 398 l.trm3 ind icbtsp-1 terminate vector for storing status 399 001000 400 .mcs. equ 512 loading base for mcs/fnp system 00665 0 01000 401 lmcs ind .mcs. base of mcs/fnp system 00666 0 01002 402 lmcs2 ind .mcs.+2 location of mcs/fnp loading base + two 00667 1 00452 403 dialst ind list,w.2 location of list icw with 36 bit xfer 404 assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 29 constants and buffers 405 eject 406 407 move program 408 000664 409 mvllmt equ *-4 low limits of mcs 000665 410 mvhlmt equ *-3 high limit of mcs 000666 411 mvwdct equ *-2 word count for mcs 000667 412 mventy equ *-1 entry point for mcs 413 end of binary card gicb0010 00670 1 47 000 414 .mov1 ldq 0,1 move mcs/fnp system 00671 2 57 000 415 stq 0,2 * 00672 173 001 416 iacx1 1 bump load pointer 00673 273 001 417 iacx2 1 bump store pointer 00674 0 63 005 701 418 cmpx1 .mov1a-* everything moved? 00675 0 64 773 670 419 tnz .mov1-* no. continue moving 00676 0 03 767 665 420 ldx2 mvhlmt-* yes. pass high limit of mcs to init routine and 421 let it clear memory 00677 0 43 770 667 422 ldx1 mventy-* get entry point of mcs 00700 1 71 777 423 tra -1,1 enter mcs 00701 0 00000 424 .mov1a ind ** location of .mov1 at end of mcs program 425 00702 0 00670 426 s.mov ind .mov1 location of the beginning of move code 00703 777766 427 l.mov vfd 18/-.mov1a+.mov1-1 length of move code (negated) assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 30 constants and buffers 428 eject 429 430 431 * * * * * * * * * * * * * * * * * * * * * * * * * * * * 432 * n.b. the following org means one must be very careful 433 * when adding code above loc 722 (8) 434 * * * * * * * * * * * * * * * * * * * * * * * * * * * * 435 00722 436 org 466 437 00722 0 00000 438 .icft. ind ** dia channel fault 00723 4331 01 439 dis 1 stop on iom fault 00724 0 71 777 723 440 tra -1 441 00725 0 00000 442 .falt. ind ** processor fault 00726 4331 02 443 dis 2 stop on fault 00727 0 71 777 726 444 tra -1 445 00730 4331 03 446 icser dis 3 bad dia status on bootload 00731 0 71 777 730 447 tra -1 stop on bad status 448 00732 4331 04 449 diaksr dis 4 checksum error on bootload data 00733 0 71 777 732 450 tra -1 stop on checksum error 451 00734 4331 05 452 icbtsp dis 5 unsuccessful bootload attempt 00735 0 71 777 734 453 tra -1 stop on unsuccessful bootload 454 00736 0 00000 455 .rtrn. ind ** spring loaded vector for 00737 4 71 777 736 456 tra -1,* extraneous interrupts assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 31 future site of bootload communication block 457 ttls future site of bootload communication block 458 00740 459 org 480 460 00740 461 dup 1,32 reserve communication area 00740 000000 462 btcomm dec 0 00741 000000 dec 0 00742 000000 dec 0 00743 000000 dec 0 00744 000000 dec 0 00745 000000 dec 0 00746 000000 dec 0 00747 000000 dec 0 00750 000000 dec 0 00751 000000 dec 0 00752 000000 dec 0 00753 000000 dec 0 00754 000000 dec 0 00755 000000 dec 0 end of binary card gicb0011 00756 000000 dec 0 00757 000000 dec 0 00760 000000 dec 0 00761 000000 dec 0 00762 000000 dec 0 00763 000000 dec 0 00764 000000 dec 0 00765 000000 dec 0 00766 000000 dec 0 00767 000000 dec 0 00770 000000 dec 0 00771 000000 dec 0 00772 000000 dec 0 00773 000000 dec 0 00774 000000 dec 0 00775 000000 dec 0 00776 000000 dec 0 00777 000000 dec 0 assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 32 cs bootload validation 463 ttls cs bootload validation 464 01000 465 org 512 466 01000 0 00000 467 .icbt. ind ** entry to bootload program 468 469 check dia status from bootload 470 01001 0 47 454 455 471 ldq diasts+1-* check second status word 01002 0 64 726 730 472 tnz icser-* bad status means bad bootload 473 474 compute checksum 475 476 01003 0 44 647 652 477 ldi icindc-* reset indicator storage word 01004 0 54 446 452 478 sti diaind-* * 01005 0 56 731 736 479 stz .rtrn.-* reset interrupt spring vector 01006 0 56 772 1000 480 stz .icbt.-* reset interrupt vector entry 01007 0 03 105 1114 481 ldx2 sintv2-* get the start of the interrupt vectors 01010 0 04 130 1140 482 ldaq intvc-* get the first words which were there 01011 0 43 107 1120 483 ldx1 diant1-* get the first cksum counter 01012 484 cksum calculate cksum 1/4 01012 0 41 002 1014 ldx3 2 01013 0 71 550 563 tra cksum-* 01014 0 01014 ind * 01015 0 43 104 1121 485 ldx1 diant2-* get second cksum counter 01016 0 03 077 1115 486 ldx2 sfltst-* start of fault status words 01017 487 cksum calculate cksum 2/4 01017 0 41 002 1021 ldx3 2 01020 0 71 543 563 tra cksum-* 01021 0 01021 ind * 01022 0 43 100 1122 488 ldx1 diant3-* get third cksum counter 01023 0 03 073 1116 489 ldx2 sdiast-* location of dia status icw 01024 490 cksum calculate cksum 3/4 01024 0 41 002 1026 ldx3 2 01025 0 71 536 563 tra cksum-* 01026 0 01026 ind * 01027 0 43 074 1123 491 ldx1 diant4-* get fourth cksum counter end of binary card gicb0012 01030 0 03 067 1117 492 ldx2 sdimb4-* location of dia dcw mailbox plus four 01031 493 cksum calculate cksum 4/4 01031 0 41 002 1033 ldx3 2 01032 0 71 531 563 tra cksum-* 01033 0 01033 ind * 01034 0 14 046 1102 494 staq temp-* save checksum assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 33 cs bootload validation 495 eject 496 497 move bootload communication region 498 01035 0 43 042 1077 499 ldx1 ltbtcm-* get pointer to temporary comm region 01036 0 03 042 1100 500 ldx2 lbtcom-* get pointer to permenant comm region 01037 473 740 501 ilq -32 set counter 01040 1 07 000 502 btcmov lda 0,1 move bootload 01041 2 17 000 503 sta 0,2 communication block 01042 173 001 504 iacx1 1 increment 01043 273 001 505 iacx2 1 block pointers 01044 573 001 506 iaq 1 reduce counter 01045 0 64 773 1040 507 tnz btcmov-* continue 508 509 check bootload checksum 510 01046 0 04 034 1102 511 ldaq temp-* get checksum 01047 0 24 727 776 512 sbaq icksmb-* compare cksum to that made by cs 01050 0 64 662 732 513 tnz diaksr-* ...checksum error... 01051 0 03 043 1114 514 ldx2 sintv2-* get pointer to start of interrupt vector 01052 2 04 016 515 ldaq 14,2 reset vectors used during bootload 01053 2 14 776 516 staq -2,2 * 01054 2 04 014 517 ldaq 12,2 * 01055 2 14 000 518 staq 0,2 * 01056 2 14 002 519 staq 2,2 * assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 34 cs bootload validation 520 eject 521 522 read dia configuration 523 01057 0 43 057 1136 524 ldx1 lcnfls-* get length of configuration dcw block 01060 525 parity cnflst calculate parity for configuration dcw's 01060 0 41 002 1062 ldx3 2 get location of dcw 01061 0 10 530 611 tsy parity-* call parity calculation routine 01062 0 01124 ind cnflst location of dia dcw 01063 0 43 054 1137 526 ldx1 l.trm1-* set return address for terminate from 01064 0 04 040 1124 527 ldaq cnflst-* get configuration list icw 01065 0 71 507 574 528 tra diaioc-* the configuration read & go initiate i/o 529 01066 0 00000 530 .trm1 ind ** 01067 0 47 017 1106 531 ldq csmbx-* get the mailbox address from the switches 01070 0 07 017 1107 532 lda csics-* get the interrupt cell number 01071 0 67 675 766 533 cmpq dimbx-* is it the same as the cs said? 01072 0 64 446 540 534 tnz dianfr-* no. configuration error 535 01073 0 27 674 767 536 cmpa icintn-* compare interrupt cell switches 01074 0 64 444 540 537 tnz dianfr-* no good, report error 538 01075 4 71 001 1076 539 tra lbt10-*,* all ok so far, load mcs 540 01076 0 00460 541 lbt10 ind icbt10 location of the mcs load routine 542 01077 0 01144 543 ltbtcm ind tbtcom location of temporary boot comm region 01100 0 00740 544 lbtcom ind btcomm location of permanent boot comm region 01101 233100 01102 545 even 01102 000000 546 temp dec 0,0 temporary storage 01103 000000 547 548 dia configuration data area 549 01104 550 even 01104 551 config null end of binary card gicb0013 01104 000000 552 cspab oct port a and port b 01105 000000 553 cspcd oct port c and port d 01106 000000 554 csmbx oct cs mailbox address 01107 000000 555 csics oct cs interrupt cell switch 01110 000000 556 cslwa oct lower address bounds switches 01111 000000 557 csupc oct upper address bounds switches 01112 558 bss 2 assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 35 cs bootload validation 559 eject 01114 0 00002 560 sintv2 ind intv+2 location of interrupt vectors plus two 01115 0 00420 561 sfltst ind fltst location of iom fault status words 01116 0 00456 562 sdiast ind dist location of dia status icw 01117 0 00460 563 sdimb4 ind dimb+4 location of dia pcw mailbox plus four 01120 000376 564 diant1 dec 254 cksum counter for interrupt vector area 01121 000030 565 diant2 dec 24 cksum counter for flt vctrs & flt status 01122 000002 566 diant3 dec 2 cksum counter for dia status icw 01123 0 00522 567 diant4 ind end-icbt10-2 cksum counter for bootload program 568 01124 1 01126 569 cnflst dcw *+2,4 configuration list icw 01125 000004 01126 000000 570 vfd 18/,18/diardc read configuration dcw 01127 000074 01130 1 01104 571 dcw config,4 01131 000004 01132 000000 572 vfd 18/,18/diadis disconnect dcw 01133 000070 01134 1 00000 573 zero 0,w.2 01135 0 00000 574 zero 01136 0 00012 575 lcnfls ind *-cnflst length of configuration dcw block 576 577 01137 0 01066 578 l.trm1 ind .trm1 terminate vector for configuration read 01140 579 even 01140 100002 580 intvc vfd 3/w.2,15/2 first words of interrupt vector area 01141 060002 581 vfd 3/0,1/1,1/1,13/2 582 583 01142 010201 584 date 01143 001002 assm 01 12-10-82 15.806 mcs/fnp intercomputer bootload routine page 36 bootload communication block 585 ttls bootload communication block 586 01144 587 tbtcom even 001204 588 end equ *+32 last location of bootload program 00740 589 loc 480 590 591 mcs/fnp list icw control block 592 00740 1 00742 593 iclist dcw icdcw1,** list icw 00741 000000 00742 000000 594 icdcw1 vfd 18/,18/diactf dcw number one 00743 000076 00744 101000 595 vfd 3/w.2,15/.mcs. load 0 - 8k 00745 000000 596 vfd 6/0,12/0 00746 000000 597 icdcw2 vfd 18/,18/diactf dcw number two 00747 000076 00750 121000 598 vfd 3/w.2,15/.mcs.+8192 load 8 - 16k 00751 000000 599 vfd 6/0,12/0 end of binary card gicb0014 00752 000000 600 icdcw3 vfd 18/,18/diactf dcw number three 00753 000076 00754 141000 601 vfd 3/w.2,15/.mcs.+16384 load 16 - 24k 00755 000000 602 vfd 6/0,12/0 00756 000000 603 icdcw4 vfd 18/,18/diactf dcw number four 00757 000076 00760 161000 604 vfd 3/w.2,15/.mcs.+24576 load 24 - 32k 00761 000000 605 vfd 6/0,12/0 00762 000000 606 icdcw5 vfd 18/,18/diadis dcw number five - disconnect 00763 000070 00764 000000 607 vfd 18/0,18/0 00765 000000 00766 000000 608 dimbx dec 0 cs mailbox address 00767 000000 609 icintn dec 0 cs interrupt cells 00770 000000 610 dec 0,0 unused 00771 000000 00772 000000 611 iclmts dec 0,0 mcs load limits 00773 000000 00774 000000 612 icksma dec 0,0 mcs checksum 00775 000000 00776 000000 613 icksmb dec 0,0 bootload checksum 00777 000000 614 end of binary card gicb0015 00000 615 end end of binary card gicb0016 1144 is the next available location. 355map version/assembly dates gmpa 770711/071177 gmpb 770711/071177 gmpc 770711/071177 there were no warning flags in the above assembly assm 01 12-10-82 15.815 mcs/fnp intercomputer bootload routine page 37 octal symbol references by sequence no. 1040 btcmov 502 502 507 740 btcomm 462 462 544 563 cksum 324 262 324 332 484 487 490 493 1124 cnflst 569 525 527 569 575 1104 config 551 551 571 1107 csics 555 532 555 1106 csmbx 554 531 554 76 diactf 61 61 594 597 600 603 70 diadis 55 55 73 376 572 606 75 diaftc 60 60 371 73 diainc 58 58 373 452 diaind 226 226 251 325 329 478 574 diaioc 337 237 319 337 528 732 diaksr 449 449 513 667 dialst 403 338 403 540 dianfr 301 301 534 537 1120 diant1 564 483 564 1121 diant2 565 485 565 1122 diant3 566 488 566 1123 diant4 567 491 567 74 diardc 59 59 570 650 diary 384 327 384 454 diasts 229 229 230 242 471 454 dimb 41 41 340 344 345 563 766 dimbx 608 285 308 533 608 456 dist 41 41 562 102 ditm 41 41 386 1204 end 588 567 588 420 fltst 41 41 561 460 icbt10 234 234 306 541 567 515 icbt40 275 275 280 542 icbt50 304 296 300 304 734 icbtsp 452 398 452 742 icdcw1 594 593 594 647 icepc 381 303 305 381 535 icgtcr 297 264 297 533 icgtsr 294 243 294 652 icindc 385 250 385 477 767 icintn 609 282 311 536 609 774 icksma 612 263 612 776 icksmb 613 512 613 740 iclist 593 235 593 772 iclmts 611 247 248 269 287 611 730 icser 446 446 472 0 intv 41 41 560 1140 intvc 580 482 580 725 .falt. 442 213 214 215 216 217 218 219 220 442 1000 .icbt. 467 101 467 480 722 .icft. 438 81 87 93 99 107 113 119 125 131 137 143 149 155 161 167 438 1000 .mcs. 400 260 400 401 402 595 598 601 604 assm 01 12-10-82 15.815 mcs/fnp intercomputer bootload routine page 38 octal symbol references by sequence no. 670 .mov1 414 414 419 426 427 701 .mov1a 424 272 289 418 424 427 736 .rtrn. 455 77 83 89 95 100 103 109 115 121 127 133 139 145 151 157 163 169 455 479 656 .sstat 392 307 372 392 660 .ssts1 393 298 393 661 .ssts2 394 295 394 662 .ssts3 395 302 395 1066 .trm1 530 530 578 463 .trm2 238 238 397 1076 lbt10 541 539 541 1100 lbtcom 544 500 544 1136 lcnfls 575 524 575 653 lditm 386 341 386 452 list 368 337 368 403 703 l.mov 427 279 427 1137 l.trm1 578 526 578 663 l.trm2 397 236 397 664 l.trm3 398 318 398 666 lmcs2 402 259 402 665 lmcs 401 270 288 401 646 lstsls 379 315 379 1077 ltbtcm 543 499 543 667 mventy 412 412 422 665 mvhlmt 410 410 420 611 parity 351 316 344 351 363 364 365 525 654 parwd1 388 356 388 655 parwd2 389 359 389 1116 sdiast 562 489 562 1117 sdimb4 563 492 563 1115 sfltst 561 486 561 1114 sintv2 560 481 514 560 702 s.mov 426 273 426 632 stdcw1 371 310 370 371 636 stdcw2 373 314 373 630 stslst 370 316 317 370 379 1144 tbtcom 587 543 587 1102 temp 546 494 511 546 1 w.2 70 74 230 374 377 403 573 580 595 598 601 604 ** 46533 words of memory were used by 355map for this assembly. ----------------------------------------------------------- Historical Background This edition of the Multics software materials and documentation is provided and donated to Massachusetts Institute of Technology by Group BULL including BULL HN Information Systems Inc. as a contribution to computer science knowledge. This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell BULL Inc., Groupe BULL and BULL HN Information Systems Inc. to the development of this operating system. Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for managing computer hardware properly and for executing programs. Many subsequent operating systems incorporated Multics principles. Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . ----------------------------------------------------------- Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without fee is hereby granted,provided that the below copyright notice and historical background appear in all copies and that both the copyright notice and historical background and this permission notice appear in supporting documentation, and that the names of MIT, HIS, BULL or BULL HN not be used in advertising or publicity pertaining to distribution of the programs without specific prior written permission. Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. Copyright 2006 by BULL HN Information Systems Inc. Copyright 2006 by Bull SAS All Rights Reserved