z z z z z z z z z z z z z z z zThis is the beginning of a backup logical record. z z z z z z z z z z z z z z z zà">library_dir_dir>listings>h pds.list ¦&Yz :éyBackup_dump 21 March 1985 šÒHirneisen.SysMaint.a þ¼Hirneisen.SysMaint.a ý€f^ÿè)Æ]pQY²q€Og¹€T¤·aOg›€¦& ÿE°X ÿÒ@pds.list @Xÿ ÿÆlist list_1 ã wfã Ýñ ÿ°*.*.*  ÿ¢ COMPILATION LISTING OF SEGMENT !BBBJZjXjhcXMgg Compiled by: Multics PL/I Compiler, Release 32f, of October 9, 1989 Compiled at: Bull HN, Phoenix AZ, System-M Compiled on: 11/11/89 1007.2 mst Sat Options: table map 1 /* *********************************************************** 2* * * 3* * Copyright, (C) Honeywell Bull Inc., 1987 * 4* * * 5* * Copyright, (C) Honeywell Information Systems Inc., 1982 * 6* * * 7* * Copyright (c) 1972 by Massachusetts Institute of * 8* * Technology and Honeywell Information Systems, Inc. * 9* * * 10* *********************************************************** */ 11 12 13 /* PDS - The Process Data Segment 14* 15* Last modified (Date and reason): 16* 2/6/76 by S. Webber Initial coding 17* 9/17/76 by R. Bratt to add seg_fault, bounds_fault, vtoc_read, and vtoc_write meters. 18* 11/03/76 by M. Weaver to extend stack header 19* 04/20/77 by M. Weaver to delete rntp and 7/77 to add name template_pds 20* 06/07/78 by E. Donner to add ring_events (to prevent delayed ipc wakeups) 21* 05/10/79 by B. Margulies to eliminate exmode_level 22* 05/09/79 by Mike Grady to use shared ring 0 stacks 23* 08/17/79 by J. A. Bush for exp under/overflow restart switches & cache parity diagnostics 24* 02/28/80 by B. Margulies to use the include file for the default overflow 25* 08/26/80 by J. A. Bush for the DPS8/70M CPU 26* value. 27* 02/23/81 by J. Bongiovanni to remove temp_mode_reg (moved to prds$mode_reg_enabled) 28* 03/81 by E. Donner to remove next_itt and ect_pointers 29* 3/82 BIM for lock_array cleanup. 30* 11/82 by J. Bongiovanni to make force_write_limit per-ring 31* 2/83 by E. N. Kittlitz for hfp_exponent_enabled. 32* 830621 BIM for level improvements. 33* 10/83 by E. N. Kittlitz to resurrect obsolescent network_ptbl_idx for MR10.2. 34* 83-11-02 by E. N. Kittlitz for block_lock_count in low page, hex exponent control. 35* 83-11-21 BIM to inhibit quota and save history registers by default 36* in the initializer's process. 37* 83-12-01 E. N. Kittlitz for restart hex overflow fault control 38* 83-12-03 BIM to clear trace header properly. (and new trace format) 39* 84-12-10 Keith Loepere for throttle_segment_state_changes and other 40* covert channel related variables. 41* 1985-01-21, BIM: admin_privileges to record ring 1 priv settings. 42* 1985-04-08, BIM: no_audit_ring1_fs_object_ops to suppress auditing 43* while in the mseg primitives and RCP. 44**/ 45 46 /* format: style3,idind25 */ 47 pds: 48 procedure; 49 50 /* This program creates the pds data base */ 51 52 /* Automatic */ 53 54 dcl 1 cdsa aligned like cds_args; 55 dcl code fixed bin (35); 56 57 /* Constants */ 58 59 dcl pdsname char (3) aligned static init ("pds") options (constant); 60 dcl exclude_pad (1) char (32) aligned static options (constant) init ("pad*"); 61 62 /* Builtins */ 63 64 dcl (addr, bin, bit, decimal, divide, float, hbound, mod, null, rel, size, string, unspec) 65 builtin; 66 67 /* Entries */ 68 69 dcl com_err_ entry options (variable); 70 dcl create_data_segment_ entry (ptr, fixed bin (35)); 71 dcl get_temp_segment_ entry (char (*), ptr, fixed bin (35)); 72 dcl release_temp_segment_ entry (char (*), ptr, fixed bin (35)); 73 dcl hcs_$chname_file entry (char (*), char (*), char (*), char (*), fixed bin (35)); 74 dcl get_wdir_ entry () returns (char (168)); 75 76 /* External Static */ 77 78 dcl error_table_$segnamedup fixed bin (35) ext; 79 80 81 dcl pdsp ptr; 82 83 dcl 1 pds aligned based (pdsp), 84 2 page_fault_data like mc, /* MC for page faults and timer runouts */ 85 2 fim_data like mc, /* MC for normal faults */ 86 2 signal_data aligned like mc, /* storage for MC being signalled */ 87 2 history_reg_data (64) fixed bin (71), /* this must follow signal data */ 88 2 process_group_id char (32), /* user id for current process */ 89 2 cpu_time fixed bin (52), /* number that when subtracted from clock reading gives 90* virtual cpu time */ 91 2 virtual_delta fixed bin (52), /* temporary used in calculating VCPU time */ 92 2 virtual_time_at_eligibility 93 fixed bin (52), /* temporary used in calculation of VCPU time */ 94 2 temp_1 fixed bin (71), /* temporary */ 95 2 temp_2 fixed bin (71), /* temporary */ 96 2 time_1 fixed bin (52), /* page fault metering time */ 97 2 time_v_temp fixed bin (52), /* temporary used in calculating VCPU time */ 98 2 fim_v_temp fixed bin (52), /* VCPU temporary for the FIM */ 99 2 fim_v_delta fixed bin (71), /* VCPU temporary for the FIM */ 100 2 save_history_regs bit (1) aligned, /* = "1"b if history registers are to be saved */ 101 2 hregs_saved bit (1) aligned, /* = "1"b if history regs were saved */ 102 2 last_sp ptr, /* stack pointer at getwork time */ 103 2 apt_ptr ptr, /* pointer to this process's APT entry */ 104 2 arg_1 fixed bin (71), /* argument for pxss */ 105 2 arg_2 fixed bin (71), /* argument for pxss */ 106 2 arg_3 fixed bin (71), /* argument for pxss */ 107 2 arg_4 fixed bin (71), /* argument for pxss */ 108 2 access_authorization aligned like aim_template, 109 /* access authorization for the process */ 110 2 base_addr_reg bit (18) aligned, /* for BAR mode use */ 111 2 alarm_ring fixed bin (3), /* setting for ring alarm register */ 112 2 pxss_args_invalid bit (36) aligned, /* used by pxss masking/arg copying code */ 113 2 processid bit (0) unaligned, /* process ID (added segdef) */ 114 2 process_id bit (36) aligned, /* process ID */ 115 2 vtime_count fixed bin, /* depth counter used in VCPU calculation */ 116 2 pstep bit (0) unaligned, /* (added segdef for dstep) */ 117 2 dstep bit (18) aligned, /* rel pointer to ASTE for dseg */ 118 2 wakeup_flag bit (36) aligned, /* flag indicating type of wakeup */ 119 2 pc_call bit (36) aligned, /* flag saying type of wait */ 120 2 audit_flags bit (36) aligned, /* bits indicating types of auditing to do */ 121 2 quota_inhib fixed bin aligned, /* ON if quota checking to be inhibited */ 122 2 covert_event_count fixed bin, /* count of covert channel related segment state change events */ 123 2 page_waits fixed bin, /* page faults */ 124 2 number_of_pages_in_use 125 fixed bin, /* used in calculating memory units */ 126 2 post_purged fixed bin, /* number of post purgings */ 127 2 connect_pending bit (1) aligned, /* turned on for delayed connects to be resent by fim */ 128 2 segment_faults fixed bin (35), /* count of segment faults taken by this process */ 129 2 bounds_faults fixed bin (35), /* count of bounds faults taken by this process */ 130 2 vtoc_reads fixed bin (35), /* vtoc read I/Os done for this process */ 131 2 vtoc_writes fixed bin (35), /* vtoc write I/Os done for this process */ 132 2 mc_trace_seg fixed bin, /* seg number of object segment being traced */ 133 2 mc_trace_sw bit (2) aligned, /* switch for M. C. Tracing "11"b => trace on */ 134 2 stack_0_sdwp ptr aligned, /* ptr to stack sdw in dseg */ 135 2 stack_0_ptr ptr aligned, /* ptr to base of ring 0 stack (wired for esd) */ 136 2 tc_argp ptr, /* arg ptr used by tc */ 137 2 tc_mask bit (72) aligned, /* save tc mask */ 138 2 exp_undfl_rest bit (2) aligned, /* fim restarts underflow: '1'b = binary, '01'b = hex */ 139 2 exp_ovfl_rest bit (2) aligned, /* fim restarts exp overflow: '1'b = binary, '01'b = hex */ 140 2 eovfl_value bit (72) aligned, /* value DFLD'ed by fim on restart binary overflow */ 141 2 hex_eovfl_value bit (72) aligned, /* value DFLD'ed by fim on restart hex overflow */ 142 2 cpar_err_data bit (72) aligned, /* cache parity error data (from cache) */ 143 2 cpar_mem_data bit (72) aligned, /* cache parity error data (from memory) */ 144 2 cpar_info bit (36) aligned, /* diagnose flag, cache level and absaddr # */ 145 2 hfp_exponent_enabled bit (1) aligned, /* user allowed to set IR hex exp bit */ 146 2 pre_empt_poll_return pointer, 147 2 block_lock_count fixed bin, /* count of locks held */ 148 2 throttle_segment_state_changes bit (1) aligned,/* limit bandwidth of segment state covert channels */ 149 2 first_covert_event_time fixed bin (52), 150 2 pad_for_trace_mod16 (6) fixed bin, 151 2 trace (306) fixed bin (71), /* system trace data */ 152 /* pds$trace + 16 defines the pds for idle procs */ 153 2 timer_time_out fixed bin (52), /* time out time for the process */ 154 2 timer_channel fixed bin (71), /* event channel for time out event */ 155 2 term_channel fixed bin (71), /* channel used to signal process termination */ 156 2 term_proc bit (36) aligned, /* process ID of process to signal term process */ 157 2 pl1_machine fixed bin, /* nonzero if we do pl1-like things */ 158 2 validation_level fixed bin (3), 159 2 condition_name aligned, /* ACC string for condition name */ 160 3 len fixed bin (8) unaligned, 161 3 chars char (31) unaligned, 162 2 pad_obsolete bit (36) aligned, 163 2 ips_mask (0:7) bit (35) aligned, /* IPS masks */ 164 2 auto_mask (0:7) bit (36) aligned, /* array of automatic masks for IPS signals */ 165 2 ring_alarm_val (0:7) fixed bin, /* used in checking validation level changes */ 166 2 lock_id bit (36) aligned, /* UID used in some locking */ 167 2 mc_trace_buf ptr unaligned, /* packed ptr to mc_trace wired buffer */ 168 2 pad_end_of_page_0 bit (0) unaligned, 169 2 pathname_am aligned like pam, /* pathname associative memory */ 170 2 initial_procedure ptr, /* first procedure executed in a new process */ 171 2 account_id char (32) aligned, /* not used yet */ 172 2 access_name aligned, /* alternate form of process group id */ 173 3 user char (32) aligned, 174 3 project char (32) aligned, 175 3 tag char (32) aligned, 176 2 home_dir char (168) aligned, /* home directory */ 177 2 process_dir_name char (32) aligned, /* name of process directory */ 178 2 wdir (0:7) ptr, /* pointers to per-ring working directories */ 179 2 wdir_uid (0:7) bit (36) aligned, /* UID of per-ring working directories */ 180 2 transparent bit (36) aligned, /* transparent usage, mod, pd switch */ 181 2 itt_head bit (18) aligned, /* top of present ITT list */ 182 2 max_access_authorization 183 aligned like aim_template, 184 /* max authorization this user can attain */ 185 2 stacks (0:7) ptr, /* per-ring stack pointers */ 186 2 kstp ptr, /* pointer to start of KST */ 187 2 events_pending bit (36) aligned, /* special wakeups pending */ 188 2 special_channels bit (36) aligned, /* special channels assigned */ 189 2 event_masks (7) bit (36) aligned, /* per-ring mask for special channels */ 190 2 initial_ring fixed bin (3), /* initial ring of execution for the process */ 191 2 interrupt_ring fixed bin (3), /* lowest ring in which IPS interrupts are allowed */ 192 2 highest_ring fixed bin (3), /* highest ring in which process can run */ 193 2 prelinked_ring bit (8) aligned, /* bit(i) is ON if ring (i) is prelinked */ 194 2 unique_scu_index bit (36) aligned, /* used to tag MC */ 195 2 max_lot_size (0:7) fixed bin, /* sizes lots can grow to */ 196 2 lot_stack_size (0:7) fixed bin, /* size of lot in stack (0 -> lot not in stack) */ 197 2 clr_stack_size (0:7) fixed bin, /* size of CLR in stack */ 198 2 link_meters_bins (4) fixed bin, /* histograms of linkage faults */ 199 2 link_meters_times (4) fixed bin (30), /* histogram of linkage fault times */ 200 2 link_meters_pgwaits (4) fixed bin, /* histogram of linkage faults PF's */ 201 2 dmpr_copy_dirsegp ptr, /* ptr to temp segment into which dirs are copied */ 202 2 dmpr_pvid bit (36), /* pvid of volume being dumped */ 203 2 dmpr_pvtx fixed bin, /* pvtx of volume being dumped */ 204 2 first_call fixed bin, /* ON until leave ring zero once */ 205 2 mc_save_area bit (18) aligned, /* rel pointer to start of saved MC area */ 206 2 mc_save_ptr bit (18) aligned, /* ptr to next mc save place */ 207 2 mc_save_limit bit (18) aligned, /* max address where MC can be saved */ 208 2 useable_lot bit (8) aligned, /* indicates whether lot can be referenced */ 209 2 ring_events bit (36) aligned, /* per-ring indicator that itt messages copied to ect */ 210 2 force_write_limit (0:7) fixed bin, /* limit on force-writing */ 211 /* Following must be doubleword aligned! */ 212 2 ipc_vars aligned, /* holds state of fast_hc_ipc at block */ 213 3 ap pointer unal, 214 3 retsw fixed bin (35), 215 3 save_entry_ret fixed bin (35), 216 3 truncated_stacks fixed bin (35), 217 3 chan fixed bin (71), 218 3 block_start_steps fixed bin (35), 219 3 stk_temp fixed bin (35), 220 2 ipc_block_return bit (36), /* ipc block return address */ 221 2 avg_block_steps fixed bin (35, 18), 222 2 admin_privileges bit (36) aligned, /* There is a 1 here for each privilege that must be reset on exit from ring 1 */ 223 2 no_audit_ring1_fs_object_ops bit (1) aligned, /* Ring 1 has asked to turn off ring 0 auditing */ 224 2 pad_for_data_mod16 (6) fixed bin (35), 225 2 data bit (0) aligned; /* to mark end of PDS for MC save area */ 226 227 call get_temp_segment_ ("pds", pdsp, code); /* Returns ZEROS */ 228 229 /* Now begins the initialization */ 230 231 pds.process_group_id = "Initializer.SysDaemon.z"; 232 233 pds.access_authorization.categories = (18)"0"b; 234 pds.access_authorization.level = 0; 235 pds.access_authorization.dir = "1"b; /* for initializer */ 236 pds.access_authorization.seg = "1"b; 237 pds.access_authorization.rcp = "1"b; 238 pds.access_authorization.ipc = "1"b; 239 pds.access_authorization.soos = "1"b; /* .. */ 240 241 pds.max_access_authorization.categories = (18)"1"b || (18)"0"b; 242 pds.max_access_authorization.level = 7; 243 244 pds.quota_inhib = 1; /* initializer ignore rqover until it is enabled */ 245 pds.vtime_count = -1; 246 pds.process_id = (36)"1"b; 247 pds.lock_id = (36)"1"b; 248 pds.pl1_machine = 1; 249 pds.ips_mask (*) = (35)"1"b; 250 pds.force_write_limit (*) = 1; 251 252 pds.save_history_regs = "1"b; 253 pds.hregs_saved = "0"b; 254 pds.history_reg_data (*) = 0; 255 256 pds.mc_trace_buf = null; 257 pds.mc_trace_sw = "0"b; 258 pds.mc_trace_seg = 0; 259 260 pds.eovfl_value = unspec (Default_exponent_control_overflow_value); 261 pds.hex_eovfl_value = unspec (Default_hex_exponent_control_overflow_value); 262 /* set default exp overflow restart value */ 263 pds.exp_ovfl_rest, pds.exp_undfl_rest = "0"b; 264 265 pds.stack_0_sdwp = null; 266 pds.stack_0_ptr = null; 267 pds.pad_for_trace_mod16 (*) = 0; 268 269 unspec (pds.trace) = ""b; 270 trace_ptr = addr (pds.trace); 271 trace.last_available = divide (hbound (pds.trace, 1) * size (page_trace_entry) - 8, 2, 17, 0); 272 trace.threshold = .75 * float (decimal (trace.last_available)); 273 274 pds.initial_procedure = null; 275 276 pds.access_name.user = "Initializer"; 277 pds.access_name.project = "SysDaemon"; 278 pds.access_name.tag = "z"; 279 280 pds.home_dir = ">system_control_1"; 281 pds.process_dir_name = ">process_dir_dir>!zzzzzzzbBBBBBB"; 282 283 pds.wdir (*) = null; 284 pds.wdir_uid (*) = "0"b; 285 286 287 288 pds.stacks (*) = null; 289 290 pds.dmpr_pvid = "0"b; 291 pds.dmpr_pvtx = 0; 292 pds.dmpr_copy_dirsegp = null; 293 294 pds.kstp = null; 295 pds.first_call = 1; 296 pds.initial_ring = 1; 297 pds.interrupt_ring = 4; 298 pds.highest_ring = 7; 299 300 pds.max_lot_size (*) = 1024; 301 302 pds.mc_save_area = rel (addr (pds.data)); 303 pds.mc_save_ptr = rel (addr (pds.data)); 304 pds.mc_save_limit = bit (bin (4096, 18), 18); /* Allow for as many as fit in 4K. */ 305 306 /* Now make some checks on alignment of certain variables */ 307 308 call check (addr (pds.ipc_vars), "ipc_vars", 2); 309 call check (addr (pds.page_fault_data), "page_fault_data", 16); 310 call check (addr (pds.trace), "trace", 16); 311 call check (addr (pds.signal_data), "signal_data", 16); 312 call check (addr (pds.eovfl_value), "eovfl_value", 2); 313 call check (addr (pds.hex_eovfl_value), "hex_eovfl_value", 2); 314 call check (addr (pds.data), "data", 16); 315 if bin (rel (addr (pds.pad_end_of_page_0)), 18) ^= 1024 316 then call com_err_ (0, pdsname, "Wired portion must end at 1024"); 317 318 /* Now set up call to create data base */ 319 320 cdsa.sections (1).p = addr (pds); 321 cdsa.sections (1).len = size (pds); 322 cdsa.sections (1).struct_name = "pds"; 323 324 cdsa.seg_name = "pds"; 325 cdsa.num_exclude_names = 1; 326 cdsa.exclude_array_ptr = addr (exclude_pad); 327 328 string (cdsa.switches) = "0"b; 329 cdsa.switches.have_text = "1"b; 330 331 call create_data_segment_ (addr (cdsa), code); 332 333 call release_temp_segment_ ("pds", pdsp, code); 334 335 call hcs_$chname_file (get_wdir_ (), "pds", "", "template_pds", code); 336 if code ^= 0 337 then if code ^= error_table_$segnamedup 338 then call com_err_ (code, pdsname, "Unable to add name template_pds."); 339 340 341 check: 342 proc (where, message, modulo); 343 344 dcl where ptr; 345 dcl message char (*); 346 dcl modulo fixed bin; 347 dcl remainder fixed bin; 348 349 remainder = mod (bin (rel (where), 18), modulo); 350 if remainder ^= 0 351 then call com_err_ (0, pdsname, "The variable ^a is ^d words away from being aligned on a ^d-word boundary.", 352 message, (modulo - remainder), modulo); 353 354 end check; 355 /* BEGIN INCLUDE FILE aim_template.incl.pl1 */ 1 2 1 3 /* Created 740723 by PG */ 1 4 /* Modified 06/28/78 by C. D. Tavares to add rcp privilege */ 1 5 /* Modified 83-05-10 by E. N. Kitltitz to add communications privilege */ 1 6 1 7 /* This structure defines the components of both an access 1 8* class and an access authorization as interpreted by the 1 9* Access Isolation Mechanism. */ 1 10 1 11 1 12 dcl 1 aim_template aligned based, /* authorization/access class template */ 1 13 2 categories bit (36), /* access categories */ 1 14 2 level fixed bin (17) unaligned, /* sensitivity level */ 1 15 2 privileges unaligned, /* special access privileges (in authorization only) */ 1 16 (3 ipc, /* interprocess communication privilege */ 1 17 3 dir, /* directory privilege */ 1 18 3 seg, /* segment privilege */ 1 19 3 soos, /* security out-of-service privilege */ 1 20 3 ring1, /* ring 1 access privilege */ 1 21 3 rcp, /* RCP resource access privilege */ 1 22 3 comm) bit (1), /* communications cross-AIM privilege */ 1 23 3 pad bit (11); 1 24 1 25 1 26 /* END INCLUDE FILE aim_template.incl.pl1 */ 355 356 /* BEGIN INCLUDE FILE cds_args.incl.pl1 */ 2 2 2 3 dcl 1 cds_args based aligned, 2 4 2 sections (2), 2 5 3 p ptr, /* pointer to data for text/static section */ 2 6 3 len fixed bin (18), /* size of text/static section */ 2 7 3 struct_name char (32), /* name of declared structure for this section */ 2 8 2 seg_name char (32), /* name to create segment by */ 2 9 2 num_exclude_names fixed bin, /* number of names in exclude array */ 2 10 2 exclude_array_ptr ptr, /* pointer to array of exclude names */ 2 11 2 switches, /* control switches */ 2 12 3 defs_in_link bit (1) unal, /* says put defs in linkage */ 2 13 3 separate_static bit (1) unal, /* says separate static section is wanted */ 2 14 3 have_text bit (1) unal, /* ON if text section given */ 2 15 3 have_static bit (1) unal, /* ON if static section given */ 2 16 3 pad bit (32) unal; 2 17 2 18 dcl exclude_names (1) char (32) based; /* pointed to be cds_args.exclude_array_ptr */ 2 19 2 20 /* END INCLUDE FILE cds_args.incl.pl1 */ 356 357 3 2 /* BEGIN INCLUDE FILE ... exponent_control_info.incl.pl1 */ 3 3 3 4 /* Created by Benson I. Margulies 2-80 */ 3 5 3 6 declare Default_exponent_control_overflow_value float bin (63) aligned 3 7 internal static options (constant) init 3 8 (0.111111111111111111111111111111111111111111111111111111111111111e+127b); 3 9 3 10 declare Default_hex_exponent_control_overflow_value float bin (63) aligned 3 11 internal static options (constant) init 3 12 (0.111111111111111111111111111111111111111111111111111111111111111e+127b); 3 13 3 14 /* END INCLUDE FILE ... exponent_control_info.incl.pl1 */ 3 15 357 358 /* */ 4 2 /* BEGIN INCLUDE FILE mc.incl.pl1 Created Dec 72 for 6180 - WSS. */ 4 3 /* Modified 06/07/76 by Greenberg for mc.resignal */ 4 4 /* Modified 07/07/76 by Morris for fault register data */ 4 5 /* Modified 08/28/80 by J. A. Bush for the DPS8/70M CVPU */ 4 6 /* Modified '82 to make values constant */ 4 7 4 8 /* words 0-15 pointer registers */ 4 9 4 10 dcl mcp ptr; 4 11 4 12 dcl 1 mc based (mcp) aligned, 4 13 2 prs (0:7) ptr, /* POINTER REGISTERS */ 4 14 (2 regs, /* registers */ 4 15 3 x (0:7) bit (18), /* index registers */ 4 16 3 a bit (36), /* accumulator */ 4 17 3 q bit (36), /* q-register */ 4 18 3 e bit (8), /* exponent */ 4 19 3 pad1 bit (28), 4 20 3 t bit (27), /* timer register */ 4 21 3 pad2 bit (6), 4 22 3 ralr bit (3), /* ring alarm register */ 4 23 4 24 2 scu (0:7) bit (36), 4 25 4 26 2 mask bit (72), /* mem controller mask at time of fault */ 4 27 2 ips_temp bit (36), /* Temporary storage for IPS info */ 4 28 2 errcode fixed bin (35), /* fault handler's error code */ 4 29 2 fim_temp, 4 30 3 unique_index bit (18) unal, /* unique index for restarting faults */ 4 31 3 resignal bit (1) unal, /* recompute signal name with fcode below */ 4 32 3 fcode bit (17) unal, /* fault code used as index to FIM table and SCT */ 4 33 2 fault_reg bit (36), /* fault register */ 4 34 2 pad2 bit (1), 4 35 2 cpu_type fixed bin (2) unsigned, /* L68 = 0, DPS8/70M = 1 */ 4 36 2 ext_fault_reg bit (15), /* extended fault reg for DPS8/70M CPU */ 4 37 2 fault_time bit (54), /* time of fault */ 4 38 4 39 2 eis_info (0:7) bit (36)) unaligned; 4 40 4 41 4 42 dcl (apx fixed bin init (0), 4 43 abx fixed bin init (1), 4 44 bpx fixed bin init (2), 4 45 bbx fixed bin init (3), 4 46 lpx fixed bin init (4), 4 47 lbx fixed bin init (5), 4 48 spx fixed bin init (6), 4 49 sbx fixed bin init (7)) internal static options (constant); 4 50 4 51 4 52 4 53 4 54 dcl scup ptr; 4 55 4 56 dcl 1 scu based (scup) aligned, /* SCU DATA */ 4 57 4 58 4 59 /* WORD (0) */ 4 60 4 61 (2 ppr, /* PROCEDURE POINTER REGISTER */ 4 62 3 prr bit (3), /* procedure ring register */ 4 63 3 psr bit (15), /* procedure segment register */ 4 64 3 p bit (1), /* procedure privileged bit */ 4 65 4 66 2 apu, /* APPENDING UNIT STATUS */ 4 67 3 xsf bit (1), /* ext seg flag - IT modification */ 4 68 3 sdwm bit (1), /* match in SDW Ass. Mem. */ 4 69 3 sd_on bit (1), /* SDW Ass. Mem. ON */ 4 70 3 ptwm bit (1), /* match in PTW Ass. Mem. */ 4 71 3 pt_on bit (1), /* PTW Ass. Mem. ON */ 4 72 3 pi_ap bit (1), /* Instr Fetch or Append cycle */ 4 73 3 dsptw bit (1), /* Fetch of DSPTW */ 4 74 3 sdwnp bit (1), /* Fetch of SDW non paged */ 4 75 3 sdwp bit (1), /* Fetch of SDW paged */ 4 76 3 ptw bit (1), /* Fetch of PTW */ 4 77 3 ptw2 bit (1), /* Fetch of pre-paged PTW */ 4 78 3 fap bit (1), /* Fetch of final address paged */ 4 79 3 fanp bit (1), /* Fetch of final address non-paged */ 4 80 3 fabs bit (1), /* Fetch of final address absolute */ 4 81 4 82 2 fault_cntr bit (3), /* number of retrys of EIS instructions */ 4 83 4 84 4 85 /* WORD (1) */ 4 86 4 87 2 fd, /* FAULT DATA */ 4 88 3 iro bit (1), /* illegal ring order */ 4 89 3 oeb bit (1), /* out of execute bracket */ 4 90 3 e_off bit (1), /* no execute */ 4 91 3 orb bit (1), /* out of read bracket */ 4 92 3 r_off bit (1), /* no read */ 4 93 3 owb bit (1), /* out of write bracket */ 4 94 3 w_off bit (1), /* no write */ 4 95 3 no_ga bit (1), /* not a gate */ 4 96 3 ocb bit (1), /* out of call bracket */ 4 97 3 ocall bit (1), /* outward call */ 4 98 3 boc bit (1), /* bad outward call */ 4 99 3 inret bit (1), /* inward return */ 4 100 3 crt bit (1), /* cross ring transfer */ 4 101 3 ralr bit (1), /* ring alarm register */ 4 102 3 am_er bit (1), /* associative memory fault */ 4 103 3 oosb bit (1), /* out of segment bounds */ 4 104 3 paru bit (1), /* processor parity upper */ 4 105 3 parl bit (1), /* processor parity lower */ 4 106 3 onc_1 bit (1), /* op not complete type 1 */ 4 107 3 onc_2 bit (1), /* op not complete type 2 */ 4 108 4 109 2 port_stat, /* PORT STATUS */ 4 110 3 ial bit (4), /* illegal action lines */ 4 111 3 iac bit (3), /* illegal action channel */ 4 112 3 con_chan bit (3), /* connect channel */ 4 113 4 114 2 fi_num bit (5), /* (fault/interrupt) number */ 4 115 2 fi_flag bit (1), /* 1 => fault, 0 => interrupt */ 4 116 4 117 4 118 /* WORD (2) */ 4 119 4 120 2 tpr, /* TEMPORARY POINTER REGISTER */ 4 121 3 trr bit (3), /* temporary ring register */ 4 122 3 tsr bit (15), /* temporary segment register */ 4 123 4 124 2 pad2 bit (9), 4 125 4 126 2 cpu_no bit (3), /* CPU number */ 4 127 4 128 2 delta bit (6), /* tally modification DELTA */ 4 129 4 130 4 131 /* WORD (3) */ 4 132 4 133 2 word3 bit (18), 4 134 4 135 2 tsr_stat, /* TSR STATUS for 1,2,&3 word instructions */ 4 136 3 tsna, /* Word 1 status */ 4 137 4 prn bit (3), /* Word 1 PR number */ 4 138 4 prv bit (1), /* Word 1 PR valid bit */ 4 139 3 tsnb, /* Word 2 status */ 4 140 4 prn bit (3), /* Word 2 PR number */ 4 141 4 prv bit (1), /* Word 2 PR valid bit */ 4 142 3 tsnc, /* Word 3 status */ 4 143 4 prn bit (3), /* Word 3 PR number */ 4 144 4 prv bit (1), /* Word 3 PR valid bit */ 4 145 4 146 2 tpr_tbr bit (6), /* TPR.TBR field */ 4 147 4 148 4 149 /* WORD (4) */ 4 150 4 151 2 ilc bit (18), /* INSTRUCTION COUNTER */ 4 152 4 153 2 ir, /* INDICATOR REGISTERS */ 4 154 3 zero bit (1), /* zero indicator */ 4 155 3 neg bit (1), /* negative indicator */ 4 156 3 carry bit (1), /* carryry indicator */ 4 157 3 ovfl bit (1), /* overflow indicator */ 4 158 3 eovf bit (1), /* eponent overflow */ 4 159 3 eufl bit (1), /* exponent underflow */ 4 160 3 oflm bit (1), /* overflow mask */ 4 161 3 tro bit (1), /* tally runout */ 4 162 3 par bit (1), /* parity error */ 4 163 3 parm bit (1), /* parity mask */ 4 164 3 bm bit (1), /* ^bar mode */ 4 165 3 tru bit (1), /* truncation mode */ 4 166 3 mif bit (1), /* multi-word instruction mode */ 4 167 3 abs bit (1), /* absolute mode */ 4 168 3 hex bit (1), /* hexadecimal exponent mode */ 4 169 3 pad bit (3), 4 170 4 171 4 172 /* WORD (5) */ 4 173 4 174 2 ca bit (18), /* COMPUTED ADDRESS */ 4 175 4 176 2 cu, /* CONTROL UNIT STATUS */ 4 177 3 rf bit (1), /* on first cycle of repeat instr */ 4 178 3 rpt bit (1), /* repeat instruction */ 4 179 3 rd bit (1), /* repeat double instruction */ 4 180 3 rl bit (1), /* repeat link instruciton */ 4 181 3 pot bit (1), /* IT modification */ 4 182 3 pon bit (1), /* return type instruction */ 4 183 3 xde bit (1), /* XDE from Even location */ 4 184 3 xdo bit (1), /* XDE from Odd location */ 4 185 3 poa bit (1), /* operation preparation */ 4 186 3 rfi bit (1), /* tells CPU to refetch instruction */ 4 187 3 its bit (1), /* ITS modification */ 4 188 3 if bit (1), /* fault occured during instruction fetch */ 4 189 4 190 2 cpu_tag bit (6)) unaligned, /* computed tag field */ 4 191 4 192 4 193 /* WORDS (6,7) */ 4 194 4 195 2 even_inst bit (36), /* even instruction of faulting pair */ 4 196 4 197 2 odd_inst bit (36); /* odd instruction of faulting pair */ 4 198 4 199 4 200 4 201 4 202 4 203 4 204 /* ALTERNATE SCU DECLARATION */ 4 205 4 206 4 207 dcl 1 scux based (scup) aligned, 4 208 4 209 (2 pad0 bit (36), 4 210 4 211 2 fd, /* GROUP II FAULT DATA */ 4 212 3 isn bit (1), /* illegal segment number */ 4 213 3 ioc bit (1), /* illegal op code */ 4 214 3 ia_am bit (1), /* illegal address - modifier */ 4 215 3 isp bit (1), /* illegal slave procedure */ 4 216 3 ipr bit (1), /* illegal procedure */ 4 217 3 nea bit (1), /* non existent address */ 4 218 3 oobb bit (1), /* out of bounds */ 4 219 3 pad bit (29), 4 220 4 221 2 pad2 bit (36), 4 222 4 223 2 pad3a bit (18), 4 224 4 225 2 tsr_stat (0:2), /* TSR STATUS as an ARRAY */ 4 226 3 prn bit (3), /* PR number */ 4 227 3 prv bit (1), /* PR valid bit */ 4 228 4 229 2 pad3b bit (6)) unaligned, 4 230 4 231 2 pad45 (0:1) bit (36), 4 232 4 233 2 instr (0:1) bit (36); /* Instruction ARRAY */ 4 234 4 235 4 236 4 237 /* END INCLUDE FILE mc.incl.pl1 */ 358 359 /* BEGIN INCLUDE FILE pathname_am.incl.pl1 MODIFIED Februrary 2, 1976 BY R. Bratt */ 5 2 /* Modified November 1984 by Keith Loepere to change PAM to use uid's. */ 5 3 5 4 dcl active_hardcore_data$pam_flush_level fixed bin (34) ext, 5 5 active_hardcore_data$pam_flush_buffer (0:31) bit (36) aligned ext; 5 6 5 7 dcl pds$pathname_am ext; 5 8 5 9 dcl PAM_name_max_lth fixed bin (17) static options (constant) init (68); 5 10 5 11 dcl amp ptr; 5 12 dcl 1 pam aligned based (amp), 5 13 2 (fp, /* head of circular pam entry list */ 5 14 bp) ptr unalign