COMPILATION LISTING OF SEGMENT ring_alarm Compiled by: Multics PL/I Compiler, Release 32f, of October 9, 1989 Compiled at: Bull HN, Phoenix AZ, System-M Compiled on: 11/11/89 1001.4 mst Sat Options: optimize map 1 /****^ ****************************************************** 2* * * 3* * Copyright, (C) Honeywell Bull Inc., 1987 * 4* * * 5* * Copyright (c) 1986 by Massachusetts Institute of * 6* * Technology and Honeywell Information Systems, Inc. * 7* * * 8* * Copyright (c) 1972 by Massachusetts Institute of * 9* * Technology and Honeywell Information Systems, Inc. * 10* * * 11* ****************************************************** */ 12 13 14 15 /****^ HISTORY COMMENTS: 16* 1) change(86-05-13,GJohnson), approve(86-05-13,MCR7387), 17* audit(86-05-13,Martinson), install(86-05-14,MR12.0-1056): 18* Correct error message documentation. 19* END HISTORY COMMENTS */ 20 21 22 /* format: style2 */ 23 24 /* RING_ALARM - The Ring Alarm Register Management Procedure. 25* coded 10/2/72 by S. H. Webber and N. I. Morris 26* modified 2/26/76 by Noel I. Morris for new reconfig 27* modified 2/8/82 by J. Bongiovanni to set ralr to 1 if masked (conditionally) 28* 29* modified 830518 BIM to correctly check pds */ 30 /* futher modified 8306 to revamp strategy -- call side polling added */ 31 32 /* 830529 BIM to add poll entrypoint for call side ring alarm check */ 33 /* Modified 1985-01-21, BIM: admin_privilege resetting. */ 34 35 /* See level.alm for explanation of validation level protocols. */ 36 37 38 ring_alarm: 39 procedure; 40 41 42 dcl a_mcp ptr; /* pointer to machine conditions */ 43 44 dcl target_ring fixed bin (3); /* target ring which caused ring alarm fault */ 45 dcl i fixed bin; /* ring number iteration variable */ 46 dcl mask fixed bin (71); /* interrupt mask */ 47 dcl setting fixed bin (4); /* new setting for ring alarm register */ 48 49 dcl pds$admin_privileges bit (36) aligned ext; 50 dcl pds$alarm_ring fixed bin (3) ext; /* setting of ring alarm register */ 51 dcl pds$apt_ptr ptr ext; /* pointer to APT entry for this process */ 52 dcl pds$connect_pending bit (1) aligned ext; 53 /* non-zero if fim to do connect after return */ 54 dcl pds$ips_mask (0:7) bit (36) aligned ext; 55 /* mask for IPS signals in each ring */ 56 dcl pds$ring_alarm_val (0:7) fixed bin (3) ext; 57 58 dcl pds$process_group_id char (32) ext static; 59 dcl pds$validation_level fixed bin (3) ext; /* current validation level */ 60 61 dcl scs$sys_level fixed bin (71) ext; 62 63 dcl wired_hardcore_data$trap_invalid_masked 64 bit (1) aligned ext; 65 dcl severity fixed bin; 66 dcl (stop_flag, pre_empt_flag, ips_flag, check_ips, validation_flag, privileges_flag) 67 bit (1) aligned init ("0"b); 68 /* flags to prevent resetting alarm after detecting condition */ 69 70 dcl fs_get$path_name entry (ptr, char (*), fixed bin (21), char (*), fixed bin (35)); 71 dcl pmut$lrar entry (fixed bin (3)); 72 dcl pmut$read_mask entry (fixed bin (71)); 73 dcl pxss$force_stop entry; 74 dcl set_privileges$admin_ring_alarm 75 entry; 76 dcl syserr entry options (variable); 77 dcl syserr$binary entry options (variable); 78 dcl (addr, codeptr, fixed, max, min, mod) 79 builtin; 80 81 declare active_hardcore_data$validation_fix_severity 82 fixed bin external; 83 dcl any_other condition; 84 85 86 /* RING_ALARM$FAULT - The Ring Alarm Fault Handler. */ 87 88 fault: 89 entry (a_mcp); 90 mcp = a_mcp; /* copy arg */ 91 92 scup = addr (mcp -> mc.scu (0)); /* get pointer to SCU data */ 93 94 /* Determine the target ring at the time of the fault. */ 95 96 target_ring = fixed (scup -> scu.tpr.trr, 3); 97 98 call ANALYZE_RING_ALARM$$fault (target_ring); 99 100 101 pds$connect_pending = pds$connect_pending | stop_flag | pre_empt_flag | ips_flag; 102 /* On fault side we still take connects */ 103 104 /* No other checks are made now. We will drop into the code for 105* ring_alarm$reset to compute and set a new value for the 106* ring alarm register. */ 107 108 109 /* RING_ALARM$RESET - Compute new setting for ring alarm register. */ 110 111 reset: 112 entry; 113 114 Reset_common: 115 pds$alarm_ring = 0; /* we do complete calculation, so */ 116 setting = 8; /* Start with ring alarm reg turned off. */ 117 118 aptep = pds$apt_ptr; /* Get a pointer to APT entry for this process. */ 119 check_ips = ^ips_flag & (apte.ips_message ^= ""b); 120 121 122 do i = 0 to 7 while (setting = 8); /* Iterate through all rings. */ 123 124 if check_ips & ((apte.ips_message & pds$ips_mask (i)) ^= ""b) 125 /** if pending IPS */ 126 then setting = i; 127 else if pds$ring_alarm_val (i) ^= 0 /** or validation level was set to this ring ... */ 128 & (i < 7) /** cant call into 7 */ 129 then setting = i + 1; /* if we go beyond this ring */ 130 end; 131 132 if (pds$admin_privileges ^= ""b) /* Can only happen in ring 0 */ 133 then setting = min (2, setting); /* target ring is 2 */ 134 135 /* Test for deferred pre-empt or stop. */ 136 137 if (apte.pre_empt_pending & ^pre_empt_flag) 138 then setting = 1; 139 else if (apte.stop_pending & ^stop_flag) 140 then setting = 1; 141 142 /* Test for interrupts masked if debug parameter is set */ 143 144 if wired_hardcore_data$trap_invalid_masked 145 then do; 146 call pmut$read_mask (mask); 147 if mask = scs$sys_level 148 then setting = 1; 149 end; 150 151 152 /* Now, reset the ring alarm register if necessary. */ 153 154 setting = mod (setting, 8); /* Compute new value for RAR. */ 155 call set (fixed (setting, 3)); /* And call recursively to set it. */ 156 157 return; 158 159 reset_no_pre_empt: 160 entry; 161 162 pre_empt_flag = "1"b; 163 go to Reset_common; 164 165 166 /* SET - Entry to set the ring alarm ring. */ 167 168 set: 169 entry (ringno); 170 171 dcl ringno fixed bin (3); /* ring number to which to set ring alarm */ 172 173 174 setting = pds$alarm_ring; /* Get current RAR setting. */ 175 if setting = 0 176 then setting = 8; /* Set to 8 if RAR turned off. */ 177 setting = min (setting, ringno); /* Set new RAR value. */ 178 pds$alarm_ring = mod (setting, 8); /* .. */ 179 call pmut$lrar (pds$alarm_ring); /* Call privileged procedure to load RAR. */ 180 181 return; 182 183 184 /* RING_ALARM$POLL -- on call side, check for ring alarms that we can avoid. */ 185 186 187 poll: 188 entry returns (bit (1) aligned); 189 190 declare callerframe pointer; 191 declare outer_ring_ptr pointer; 192 declare its_ptr pointer; 193 194 if wired_hardcore_data$trap_invalid_masked 195 then do; 196 call pmut$read_mask (mask); 197 if mask = scs$sys_level 198 then call syserr (CRASH, "ring_alarm$poll: processor is masked at exit from ring 0."); 199 end; 200 201 202 callerframe = stackframeptr () -> stack_frame.prev_sp -> stack_frame.prev_sp; 203 /* caller of the gate that called us */ 204 205 outer_ring_ptr = callerframe -> stack_frame.return_ptr; 206 /* now, the ring number of outer_ring_ptr has to be first ring number of the caller's stack or larger */ 207 208 its_ptr = addr (outer_ring_ptr); 209 target_ring = its_ptr -> its_unsigned.ringno; /* get it as fb */ 210 211 call ANALYZE_RING_ALARM (target_ring); 212 213 if ^pre_empt_flag & ^stop_flag 214 then do; /* Was either validation level, which ANALYZE fixed, */ 215 /* or privileges, which ANALYZE fixed, */ 216 /* or IPS, which we cannot handle yet, */ 217 /* or completely off the wall. */ 218 call reset; /* recurse: another ring may still need an rar */ 219 return ("0"b); /* returns to outer ring for the gate */ 220 end; 221 222 223 if stop_flag 224 then call pxss$force_stop; /* This is supposed to be easy */ 225 226 /* PRE-EMPT */ 227 228 if pre_empt_flag 229 then do; 230 call reset_no_pre_empt; /* in case of val level or IPS */ 231 return ("1"b); 232 end; 233 234 call syserr (CRASH, "ring_alarm$poll: Mysterious ring alarm."); 235 236 237 /* This procedure looks at the state in the PDS, and sets bits to indicate */ 238 /* why the ring alarm register was set. */ 239 240 241 ANALYZE_RING_ALARM: 242 procedure (Target_ring); 243 244 declare Target_ring fixed bin (3); 245 declare fault bit (1); 246 declare old_validation_level fixed bin (3); 247 248 fault = "0"b; 249 go to Join; 250 251 ANALYZE_RING_ALARM$$fault: 252 entry (Target_ring); 253 254 fault = "1"b; 255 256 Join: 257 old_validation_level = pds$validation_level; 258 259 do i = 0 to Target_ring - 1; /* check all rings up to the one being returned to */ 260 if pds$ring_alarm_val (i) ^= 0 261 then do; 262 pds$validation_level = pds$ring_alarm_val (i); 263 pds$ring_alarm_val (i) = 0; /* no longer important */ 264 end; 265 end; 266 267 pds$validation_level = max (Target_ring, pds$validation_level); 268 /* never let it be < execution ring */ 269 /* do this LAST, to respect saved value if possible. */ 270 271 if old_validation_level ^= pds$validation_level & active_hardcore_data$validation_fix_severity >= 0 272 then do; 273 call syserr (active_hardcore_data$validation_fix_severity, 274 "ring_alarm: Fixed validation level^[ on fault^] from ^d to ^d.", fault, old_validation_level, 275 pds$validation_level); 276 validation_flag = "1"b; 277 end; 278 279 if pds$admin_privileges ^= ""b & Target_ring > 1 280 then do; /* Always call syserr, since this is always a bug */ 281 if active_hardcore_data$validation_fix_severity = -1 282 then severity = JUST_LOG; 283 else severity = active_hardcore_data$validation_fix_severity; 284 call syserr (severity, "ring_alarm: Reset admin privileges^[ on fault^].", fault); 285 call set_privileges$admin_ring_alarm; 286 privileges_flag = "1"b; 287 end; 288 289 /* Check to see if a stop interrupt has been delayed */ 290 291 aptep = pds$apt_ptr; /* Get pointer to our APT entry. */ 292 if apte.stop_pending 293 then stop_flag = "1"b; 294 295 /* Check to see if a pre-empt interrupt has been delayed. */ 296 297 else if apte.pre_empt_pending 298 then pre_empt_flag = "1"b; 299 300 /* Now check for any delayed IPS signals */ 301 302 else if apte.ips_message & pds$ips_mask (Target_ring) 303 then ips_flag = "1"b; 304 305 return; /* Caller can now decide what to do with this mess */ 306 307 end ANALYZE_RING_ALARM; 308 309 310 /* BEGIN MESSAGE DOCUMENTATION 311* 312* Message: 313* ring_alarm$poll: processor is masked at exit from ring 0. 314* 315* S: $crash 316* 317* T: $run 318* 319* M: A software bug has left interrupts masked to system level at 320* exit from ring 0. 321* 322* A: $inform 323* 324* 325* Message: 326* ring_alarm$poll: Mysterious ring alarm. 327* 328* S: $crash 329* 330* T: $run 331* 332* M: The ring alarm register was set on exit from ring zero, but no reason 333* for it was recorded for the process. 334* 335* A: $inform 336* 337* 338* Message: 339* ring_alarm: Fixed validation level {on fault} from OLD to NEW. 340* 341* S: $beep 342* 343* T: $run 344* 345* M: On exit from ring zero, the validation level was less than the ring 346* that is being returned to. The validation level is corrected to its 347* value when it called into the inner ring. This indicates a benign 348* bug in the inner ring entry called. 349* 350* A: $inform 351* 352* 353* Message: 354* ring_alarm$fault: Reset admin privileges. 355* 356* S: $log 357* 358* T: $run 359* 360* M: On exit from ring one, one or more AIM privileges were still set 361* by privileged ring 1 code. These are reset, and the following 362* log message from set_privileges lists them. This indicates 363* a benign bug in the ring one program that was running. 364* 365* A: $inform 366* 367*END MESSAGE DOCUMENTATION */ 368 369 /* format: off */ 370 371 /* */ 1 2 /* BEGIN INCLUDE FILE mc.incl.pl1 Created Dec 72 for 6180 - WSS. */ 1 3 /* Modified 06/07/76 by Greenberg for mc.resignal */ 1 4 /* Modified 07/07/76 by Morris for fault register data */ 1 5 /* Modified 08/28/80 by J. A. Bush for the DPS8/70M CVPU */ 1 6 /* Modified '82 to make values constant */ 1 7 1 8 /* words 0-15 pointer registers */ 1 9 1 10 dcl mcp ptr; 1 11 1 12 dcl 1 mc based (mcp) aligned, 1 13 2 prs (0:7) ptr, /* POINTER REGISTERS */ 1 14 (2 regs, /* registers */ 1 15 3 x (0:7) bit (18), /* index registers */ 1 16 3 a bit (36), /* accumulator */ 1 17 3 q bit (36), /* q-register */ 1 18 3 e bit (8), /* exponent */ 1 19 3 pad1 bit (28), 1 20 3 t bit (27), /* timer register */ 1 21 3 pad2 bit (6), 1 22 3 ralr bit (3), /* ring alarm register */ 1 23 1 24 2 scu (0:7) bit (36), 1 25 1 26 2 mask bit (72), /* mem controller mask at time of fault */ 1 27 2 ips_temp bit (36), /* Temporary storage for IPS info */ 1 28 2 errcode fixed bin (35), /* fault handler's error code */ 1 29 2 fim_temp, 1 30 3 unique_index bit (18) unal, /* unique index for restarting faults */ 1 31 3 resignal bit (1) unal, /* recompute signal name with fcode below */ 1 32 3 fcode bit (17) unal, /* fault code used as index to FIM table and SCT */ 1 33 2 fault_reg bit (36), /* fault register */ 1 34 2 pad2 bit (1), 1 35 2 cpu_type fixed bin (2) unsigned, /* L68 = 0, DPS8/70M = 1 */ 1 36 2 ext_fault_reg bit (15), /* extended fault reg for DPS8/70M CPU */ 1 37 2 fault_time bit (54), /* time of fault */ 1 38 1 39 2 eis_info (0:7) bit (36)) unaligned; 1 40 1 41 1 42 dcl (apx fixed bin init (0), 1 43 abx fixed bin init (1), 1 44 bpx fixed bin init (2), 1 45 bbx fixed bin init (3), 1 46 lpx fixed bin init (4), 1 47 lbx fixed bin init (5), 1 48 spx fixed bin init (6), 1 49 sbx fixed bin init (7)) internal static options (constant); 1 50 1 51 1 52 1 53 1 54 dcl scup ptr; 1 55 1 56 dcl 1 scu based (scup) aligned, /* SCU DATA */ 1 57 1 58 1 59 /* WORD (0) */ 1 60 1 61 (2 ppr, /* PROCEDURE POINTER REGISTER */ 1 62 3 prr bit (3), /* procedure ring register */ 1 63 3 psr bit (15), /* procedure segment register */ 1 64 3 p bit (1), /* procedure privileged bit */ 1 65 1 66 2 apu, /* APPENDING UNIT STATUS */ 1 67 3 xsf bit (1), /* ext seg flag - IT modification */ 1 68 3 sdwm bit (1), /* match in SDW Ass. Mem. */ 1 69 3 sd_on bit (1), /* SDW Ass. Mem. ON */ 1 70 3 ptwm bit (1), /* match in PTW Ass. Mem. */ 1 71 3 pt_on bit (1), /* PTW Ass. Mem. ON */ 1 72 3 pi_ap bit (1), /* Instr Fetch or Append cycle */ 1 73 3 dsptw bit (1), /* Fetch of DSPTW */ 1 74 3 sdwnp bit (1), /* Fetch of SDW non paged */ 1 75 3 sdwp bit (1), /* Fetch of SDW paged */ 1 76 3 ptw bit (1), /* Fetch of PTW */ 1 77 3 ptw2 bit (1), /* Fetch of pre-paged PTW */ 1 78 3 fap bit (1), /* Fetch of final address paged */ 1 79 3 fanp bit (1), /* Fetch of final address non-paged */ 1 80 3 fabs bit (1), /* Fetch of final address absolute */ 1 81 1 82 2 fault_cntr bit (3), /* number of retrys of EIS instructions */ 1 83 1 84 1 85 /* WORD (1) */ 1 86 1 87 2 fd, /* FAULT DATA */ 1 88 3 iro bit (1), /* illegal ring order */ 1 89 3 oeb bit (1), /* out of execute bracket */ 1 90 3 e_off bit (1), /* no execute */ 1 91 3 orb bit (1), /* out of read bracket */ 1 92 3 r_off bit (1), /* no read */ 1 93 3 owb bit (1), /* out of write bracket */ 1 94 3 w_off bit (1), /* no write */ 1 95 3 no_ga bit (1), /* not a gate */ 1 96 3 ocb bit (1), /* out of call bracket */ 1 97 3 ocall bit (1), /* outward call */ 1 98 3 boc bit (1), /* bad outward call */ 1 99 3 inret bit (1), /* inward return */ 1 100 3 crt bit (1), /* cross ring transfer */ 1 101 3 ralr bit (1), /* ring alarm register */ 1 102 3 am_er bit (1), /* associative memory fault */ 1 103 3 oosb bit (1), /* out of segment bounds */ 1 104 3 paru bit (1), /* processor parity upper */ 1 105 3 parl bit (1), /* processor parity lower */ 1 106 3 onc_1 bit (1), /* op not complete type 1 */ 1 107 3 onc_2 bit (1), /* op not complete type 2 */ 1 108 1 109 2 port_stat, /* PORT STATUS */ 1 110 3 ial bit (4), /* illegal action lines */ 1 111 3 iac bit (3), /* illegal action channel */ 1 112 3 con_chan bit (3), /* connect channel */ 1 113 1 114 2 fi_num bit (5), /* (fault/interrupt) number */ 1 115 2 fi_flag bit (1), /* 1 => fault, 0 => interrupt */ 1 116 1 117 1 118 /* WORD (2) */ 1 119 1 120 2 tpr, /* TEMPORARY POINTER REGISTER */ 1 121 3 trr bit (3), /* temporary ring register */ 1 122 3 tsr bit (15), /* temporary segment register */ 1 123 1 124 2 pad2 bit (9), 1 125 1 126 2 cpu_no bit (3), /* CPU number */ 1 127 1 128 2 delta bit (6), /* tally modification DELTA */ 1 129 1 130 1 131 /* WORD (3) */ 1 132 1 133 2 word3 bit (18), 1 134 1 135 2 tsr_stat, /* TSR STATUS for 1,2,&3 word instructions */ 1 136 3 tsna, /* Word 1 status */ 1 137 4 prn bit (3), /* Word 1 PR number */ 1 138 4 prv bit (1), /* Word 1 PR valid bit */ 1 139 3 tsnb, /* Word 2 status */ 1 140 4 prn bit (3), /* Word 2 PR number */ 1 141 4 prv bit (1), /* Word 2 PR valid bit */ 1 142 3 tsnc, /* Word 3 status */ 1 143 4 prn bit (3), /* Word 3 PR number */ 1 144 4 prv bit (1), /* Word 3 PR valid bit */ 1 145 1 146 2 tpr_tbr bit (6), /* TPR.TBR field */ 1 147 1 148 1 149 /* WORD (4) */ 1 150 1 151 2 ilc bit (18), /* INSTRUCTION COUNTER */ 1 152 1 153 2 ir, /* INDICATOR REGISTERS */ 1 154 3 zero bit (1), /* zero indicator */ 1 155 3 neg bit (1), /* negative indicator */ 1 156 3 carry bit (1), /* carryry indicator */ 1 157 3 ovfl bit (1), /* overflow indicator */ 1 158 3 eovf bit (1), /* eponent overflow */ 1 159 3 eufl bit (1), /* exponent underflow */ 1 160 3 oflm bit (1), /* overflow mask */ 1 161 3 tro bit (1), /* tally runout */ 1 162 3 par bit (1), /* parity error */ 1 163 3 parm bit (1), /* parity mask */ 1 164 3 bm bit (1), /* ^bar mode */ 1 165 3 tru bit (1), /* truncation mode */ 1 166 3 mif bit (1), /* multi-word instruction mode */ 1 167 3 abs bit (1), /* absolute mode */ 1 168 3 hex bit (1), /* hexadecimal exponent mode */ 1 169 3 pad bit (3), 1 170 1 171 1 172 /* WORD (5) */ 1 173 1 174 2 ca bit (18), /* COMPUTED ADDRESS */ 1 175 1 176 2 cu, /* CONTROL UNIT STATUS */ 1 177 3 rf bit (1), /* on first cycle of repeat instr */ 1 178 3 rpt bit (1), /* repeat instruction */ 1 179 3 rd bit (1), /* repeat double instruction */ 1 180 3 rl bit (1), /* repeat link instruciton */ 1 181 3 pot bit (1), /* IT modification */ 1 182 3 pon bit (1), /* return type instruction */ 1 183 3 xde bit (1), /* XDE from Even location */ 1 184 3 xdo bit (1), /* XDE from Odd location */ 1 185 3 poa bit (1), /* operation preparation */ 1 186 3 rfi bit (1), /* tells CPU to refetch instruction */ 1 187 3 its bit (1), /* ITS modification */ 1 188 3 if bit (1), /* fault occured during instruction fetch */ 1 189 1 190 2 cpu_tag bit (6)) unaligned, /* computed tag field */ 1 191 1 192 1 193 /* WORDS (6,7) */ 1 194 1 195 2 even_inst bit (36), /* even instruction of faulting pair */ 1 196 1 197 2 odd_inst bit (36); /* odd instruction of faulting pair */ 1 198 1 199 1 200 1 201 1 202 1 203 1 204 /* ALTERNATE SCU DECLARATION */ 1 205 1 206 1 207 dcl 1 scux based (scup) aligned, 1 208 1 209 (2 pad0 bit (36), 1 210 1 211 2 fd, /* GROUP II FAULT DATA */ 1 212 3 isn bit (1), /* illegal segment number */ 1 213 3 ioc bit (1), /* illegal op code */ 1 214 3 ia_am bit (1), /* illegal address - modifier */ 1 215 3 isp bit (1), /* illegal slave procedure */ 1 216 3 ipr bit (1), /* illegal procedure */ 1 217 3 nea bit (1), /* non existent address */ 1 218 3 oobb bit (1), /* out of bounds */ 1 219 3 pad bit (29), 1 220 1 221 2 pad2 bit (36), 1 222 1 223 2 pad3a bit (18), 1 224 1 225 2 tsr_stat (0:2), /* TSR STATUS as an ARRAY */ 1 226 3 prn bit (3), /* PR number */ 1 227 3 prv bit (1), /* PR valid bit */ 1 228 1 229 2 pad3b bit (6)) unaligned, 1 230 1 231 2 pad45 (0:1) bit (36), 1 232 1 233 2 instr (0:1) bit (36); /* Instruction ARRAY */ 1 234 1 235 1 236 1 237 /* END INCLUDE FILE mc.incl.pl1 */ 371 372 /* BEGIN INCLUDE FILE ... apte.incl.pl1 */ 2 2 2 3 /* Modified 1984-11-11 by E. Swenson for IPC event channel validation. */ 2 4 2 5 dcl aptep pointer; 2 6 2 7 dcl 1 apte based (aptep) aligned, /* APT entry declaration for an active (known) process */ 2 8 2 thread unaligned, /* List thread */ 2 9 3 fp bit (18), /* Forward pointer */ 2 10 3 bp bit (18), /* Backward pointer */ 2 11 2 flags unaligned, /* Flags and miscellaneous */ 2 12 3 mbz bit (1), /* This bit must be zero (sentinel bit) */ 2 13 3 wakeup_waiting bit (1), /* ON if process has received wakeup */ 2 14 3 stop_pending bit (1), /* ON if process has received stop connect */ 2 15 3 pre_empted bit (1), /* ON if process is being pre-empted by get_processor */ 2 16 3 hproc bit (1), /* ON if process is hardcore process */ 2 17 3 loaded bit (1), /* ON if required per-process pages are in memory and wired */ 2 18 3 eligible bit (1), /* ON if process is eligible */ 2 19 3 idle bit (1), /* ON if this is an idle process */ 2 20 3 interaction bit (1), /* ON if process has interacted recently */ 2 21 3 pre_empt_pending bit (1), /* ON if process has received pre-empt connect */ 2 22 3 default_procs_required bit (1), /* ON if apte.procs_required is system default */ 2 23 3 realtime_burst bit (1), /* ON if next eligibility is realtime */ 2 24 3 always_loaded bit (1), /* ON if process is not to be unloaded */ 2 25 3 dbr_loaded bit (1), /* ON if DBR is loaded on some CPU */ 2 26 3 being_loaded bit (1), /* ON if somebody loading this process */ 2 27 3 shared_stack_0 bit (1), /* ON if a shared stack_0 is assigned */ 2 28 3 page_wait_flag bit (1), /* flag ON if waiting for page */ 2 29 3 firstsw bit (1), /* OFF until process is intialized */ 2 30 3 state bit (18), /* execution state */ 2 31 2 page_faults fixed bin (35), /* total page faults for the process */ 2 32 2 processid bit (36), /* bit 0-17: offset of ATPE */ 2 33 /* bit 18-35: sequential number */ 2 34 2 te fixed bin (35), /* virtual time since eligibility award */ 2 35 2 ts fixed bin (35), /* virtual time since scheduling */ 2 36 2 ti fixed bin (35), /* virtual time since interaction */ 2 37 2 timax fixed bin (35), /* maximum value allowed for apte.ti */ 2 38 2 39 /* * * * * * * * */ 2 40 2 41 2 ipc_pointers unaligned, 2 42 3 event_thread bit (18), /* relative pointer to ITT list */ 2 43 3 pad3 bit (18), 2 44 2 ips_message bit (36), /* IPS signals pending */ 2 45 2 asteps unaligned, /* relative ASTE pointers */ 2 46 3 pds bit (18), /* PDS (per-process) */ 2 47 3 dseg bit (18), /* DSEG (per-process) */ 2 48 3 prds bit (18), /* PRDS (per-processor) */ 2 49 2 savex7 bit (18) unaligned, /* x7 at call to getwork (return point in pxss) */ 2 50 2 term_processid bit (36), /* process to send wakeup at temination */ 2 51 2 lock_id bit (36), /* File System unqieu ID associated with process */ 2 52 2 time_used_clock fixed bin (71), /* Total CPU time when process last lost CPU */ 2 53 2 54 /* * * * * * * * */ 2 55 2 56 2 wait_event bit (36) aligned, /* Event ID process awaiting */ 2 57 2 wct_index bit (18) unaligned, /* rel offset of WCTE */ 2 58 2 flags2 unaligned, 2 59 3 priority_scheduling bit (1), /* ON if guaranteed eligibility */ 2 60 3 special_wakeups bit (6), /* Special wakeup channels */ 2 61 3 pad7 bit (7), 2 62 3 batch bit (1), /* ON if absentee */ 2 63 3 pr_tag bit (3), /* CPU tag running or last run */ 2 64 2 state_change_time fixed bin (71), /* Time apte.state last changed */ 2 65 2 alarm_event fixed bin (71), /* wakeup event for alarm clock manager */ 2 66 2 alarm_time_thread bit (18) unaligned, /* thread of processes with pending alarms */ 2 67 2 alarm_time bit (54) unaligned, /* wakeup time for alarm */ 2 68 2 69 /* * * * * * */ 2 70 2 71 2 term_channel fixed bin (71), /* wakeup event for account overflow */ 2 72 2 ws_size fixed bin, /* working set estimate for the process */ 2 73 2 temax fixed bin (35), /* maximum eligibility slice (vcpu) */ 2 74 2 deadline fixed bin (71), /* time of next run */ 2 75 2 lock bit (18) unaligned, /* 0 => APTE locked, unlocked => return point of last unlock */ 2 76 2 unusable bit (18) unaligned, /* locking routines destroy */ 2 77 2 cpu_monitor fixed bin (35), /* if not 0, send wakeup to term_processid when virtual cpu 2 78* /* reaches this (units = 1/1024 sec) */ 2 79 2 paging_measure fixed bin (71), /* cumulative memory units */ 2 80 2 access_authorization bit (72), /* authorization of this process */ 2 81 2 dbr fixed bin (71), /* DBR value (constant since DSEG entry-held) */ 2 82 2 83 2 virtual_cpu_time fixed bin (71), /* cumulative virtual CPU time for the process */ 2 84 2 ittes_sent fixed bin (18), /* Unprocessed ITTs sent by this process */ 2 85 2 ittes_got fixed bin (18), /* Unprocessed ITTs received by this process */ 2 86 2 87 /* Cells used to drive and instrument finite-state model for response time 2 88* measurement. Maintained by meter_response_time */ 2 89 2 90 2 current_response_state fixed bin (17) unaligned, /* Process state in modle */ 2 91 2 pad18 bit (18) unaligned, 2 92 2 number_processing fixed bin (35), /* Number interactions */ 2 93 2 last_response_state_time fixed bin (71), /* Clock time at last response state change */ 2 94 2 total_processing_time fixed bin (71), /* Total interaction processing time */ 2 95 2 96 /* * * * * * */ 2 97 2 98 2 begin_interaction_vcpu fixed bin (71), /* Virtual cpu at beginning of last interaction */ 2 99 2 100 /* End of cells for finite-state model */ 2 101 2 102 2 saved_temax fixed bin (35), /* temax at eligibility award */ 2 103 2 procs_required bit (8) unaligned, /* bit mask of CPUs this process can run */ 2 104 2 pad4 bit (28) unaligned, 2 105 2 ipc_r_offset fixed bin (18) unsigned, 2 106 2 ipc_r_factor fixed bin (35) unsigned, 2 107 2 apad (10) fixed bin (35); 2 108 2 109 /* END INCLUDE FILE ... apte.incl.pl1 */ 372 373 /* BEGIN INCLUDE FILE syserr_constants.incl.pl1 ... 11/11/80 W. Olin Sibert */ 3 2 /* 85-02-12, EJ Sharpe - Added sorting class constants, removed AIM_MESSAGE, added new action code names. */ 3 3 /* 85-04-24, G. Palter - Renamed SYSERR_UNUSED_10 to SYSERR_RING1_ERROR to reflect its actual use. */ 3 4 3 5 /* This include file has an ALM version. Keep 'em in sync! */ 3 6 3 7 dcl ( 3 8 3 9 /* The following constants define the message action codes. This indicates 3 10*how a message is to be handled. */ 3 11 3 12 SYSERR_CRASH_SYSTEM init (1), 3 13 CRASH init (1), /* Crash the system, and bleat plaintively. */ 3 14 3 15 SYSERR_TERMINATE_PROCESS init (2), 3 16 TERMINATE_PROCESS init (2), /* Terminate the process, print the message, and beep. */ 3 17 3 18 SYSERR_PRINT_WITH_ALARM init (3), 3 19 BEEP init (3), /* Beep and print the message on the console. */ 3 20 3 21 SYSERR_PRINT_ON_CONSOLE init (0), 3 22 ANNOUNCE init (0), /* Just print the message on the console. */ 3 23 3 24 SYSERR_LOG_OR_PRINT init (4), 3 25 LOG init (4), /* Log the message, or print it if it can't be logged */ 3 26 3 27 SYSERR_LOG_OR_DISCARD init (5), 3 28 JUST_LOG init (5), /* Just try to log the message, and discard it if it can't be */ 3 29 3 30 3 31 /* The following constants are added to the normal severities to indicate 3 32*different sorting classes of messages. */ 3 33 3 34 SYSERR_SYSTEM_ERROR init (00), /* indicates a standard level system error */ 3 35 SYSERR_RING1_ERROR init (10), /* indicates an error detected in ring 1 (mseg_, RCP) */ 3 36 SYSERR_COVERT_CHANNEL init (20), /* indicates covert channel audit trail message */ 3 37 SYSERR_UNSUCCESSFUL_ACCESS init (30), /* indicates access denial audit trail message */ 3 38 SYSERR_SUCCESSFUL_ACCESS init (40) /* indicates access grant audit trail message */ 3 39 ) fixed bin internal static options (constant); 3 40 3 41 /* END INCLUDE FILE syserr_constants.incl.pl1 */ 373 374 /* BEGIN INCLUDE FILE its.incl.pl1 4 2* modified 27 July 79 by JRDavis to add its_unsigned 4 3* Internal format of ITS pointer, including ring-number field for follow-on processor */ 4 4 4 5 dcl 1 its based aligned, /* declaration for ITS type pointer */ 4 6 2 pad1 bit (3) unaligned, 4 7 2 segno bit (15) unaligned, /* segment number within the pointer */ 4 8 2 ringno bit (3) unaligned, /* ring number within the pointer */ 4 9 2 pad2 bit (9) unaligned, 4 10 2 its_mod bit (6) unaligned, /* should be 43(8) */ 4 11 4 12 2 offset bit (18) unaligned, /* word offset within the addressed segment */ 4 13 2 pad3 bit (3) unaligned, 4 14 2 bit_offset bit (6) unaligned, /* bit offset within the word */ 4 15 2 pad4 bit (3) unaligned, 4 16 2 mod bit (6) unaligned; /* further modification */ 4 17 4 18 dcl 1 itp based aligned, /* declaration for ITP type pointer */ 4 19 2 pr_no bit (3) unaligned, /* number of pointer register to use */ 4 20 2 pad1 bit (27) unaligned, 4 21 2 itp_mod bit (6) unaligned, /* should be 41(8) */ 4 22 4 23 2 offset bit (18) unaligned, /* word offset from pointer register word offset */ 4 24 2 pad2 bit (3) unaligned, 4 25 2 bit_offset bit (6) unaligned, /* bit offset relative to new word offset */ 4 26 2 pad3 bit (3) unaligned, 4 27 2 mod bit (6) unaligned; /* further modification */ 4 28 4 29 4 30 dcl 1 its_unsigned based aligned, /* just like its, but with unsigned binary */ 4 31 2 pad1 bit (3) unaligned, 4 32 2 segno fixed bin (15) unsigned unaligned, 4 33 2 ringno fixed bin (3) unsigned unaligned, 4 34 2 pad2 bit (9) unaligned, 4 35 2 its_mod bit (6) unaligned, 4 36 4 37 2 offset fixed bin (18) unsigned unaligned, 4 38 2 pad3 bit (3) unaligned, 4 39 2 bit_offset fixed bin (6) unsigned unaligned, 4 40 2 pad4 bit (3) unaligned, 4 41 2 mod bit (6) unaligned; 4 42 4 43 dcl 1 itp_unsigned based aligned, /* just like itp, but with unsigned binary where appropriate */ 4 44 2 pr_no fixed bin (3) unsigned unaligned, 4 45 2 pad1 bit (27) unaligned, 4 46 2 itp_mod bit (6) unaligned, 4 47 4 48 2 offset fixed bin (18) unsigned unaligned, 4 49 2 pad2 bit (3) unaligned, 4 50 2 bit_offset fixed bin (6) unsigned unaligned, 4 51 2 pad3 bit (3) unaligned, 4 52 2 mod bit (6) unaligned; 4 53 4 54 4 55 dcl ITS_MODIFIER bit (6) unaligned internal static options (constant) init ("43"b3); 4 56 dcl ITP_MODIFIER bit (6) unaligned internal static options (constant) init ("41"b3); 4 57 4 58 /* END INCLUDE FILE its.incl.pl1 */ 374 375 /* BEGIN INCLUDE FILE ... signaller_stack.incl.pl1 ... Created Feb 79 by D.Spector */ 5 2 5 3 /* This file matches signaller_stack.incl.alm and is currently used only by verify_lock */ 5 4 5 5 declare 1 signaller_stack based unaligned, 5 6 2 pad (8) bit (36), /* Make machine conditions 0 mod 16 */ 5 7 2 mach_cond (48) bit (36), /* Machine conditions */ 5 8 2 mc_ptr ptr aligned, /* Pointer to machine conditions */ 5 9 2 null_ptr ptr aligned, /* Null pointer */ 5 10 2 string_descriptor bit (36), /* Condition name descriptor */ 5 11 2 ptr_descriptor bit (36), /* M.C. ptr descriptor */ 5 12 2 arglist (18) bit (36), /* Arg list for call to signal */ 5 13 2 signal_string char (32), /* Condition name */ 5 14 2 on_unit (16) bit (36), /* Must be at 128 in stack frame */ 5 15 2 history_registers (128) bit (36); 5 16 5 17 /* on_unit must start at 128 because trap_caller_caller_ sets up a stack frame 5 18* assuming this to be so. Similarly mach_cond must start at 48. */ 5 19 5 20 /* END INCLUDE FILE ... signaller_stack.incl.pl1 ... */ 375 376 /* BEGIN INCLUDE FILE ... stack_frame.incl.pl1 ... */ 6 2 6 3 /* format: off */ 6 4 6 5 /* Modified: 16 Dec 1977, D. Levin - to add fio_ps_ptr and pl1_ps_ptr */ 6 6 /* Modified: 3 Feb 1978, P. Krupp - to add run_unit_manager bit & main_proc bit */ 6 7 /* Modified: 21 March 1978, D. Levin - change fio_ps_ptr to support_ptr */ 6 8 /* Modified: 03/01/84, S. Herbst - Added RETURN_PTR_MASK */ 6 9 6 10 6 11 /****^ HISTORY COMMENTS: 6 12* 1) change(86-09-15,Kissel), approve(86-09-15,MCR7473), 6 13* audit(86-10-01,Fawcett), install(86-11-03,MR12.0-1206): 6 14* Modified to add constants for the translator_id field in the stack_frame 6 15* structure. 6 16* END HISTORY COMMENTS */ 6 17 6 18 6 19 dcl RETURN_PTR_MASK bit (72) int static options (constant) /* mask to be AND'd with stack_frame.return_ptr */ 6 20 init ("777777777777777777000000"b3); /* when copying, to ignore bits that a call fills */ 6 21 /* with indicators (nonzero for Fortran hexfp caller) */ 6 22 /* say: unspec(ptr) = unspec(stack_frame.return_ptr) & RETURN_PTR_MASK; */ 6 23 6 24 dcl TRANSLATOR_ID_PL1V2 bit (18) internal static options (constant) init ("000000"b3); 6 25 dcl TRANSLATOR_ID_ALM bit (18) internal static options (constant) init ("000001"b3); 6 26 dcl TRANSLATOR_ID_PL1V1 bit (18) internal static options (constant) init ("000002"b3); 6 27 dcl TRANSLATOR_ID_SIGNAL_CALLER bit (18) internal static options (constant) init ("000003"b3); 6 28 dcl TRANSLATOR_ID_SIGNALLER bit (18) internal static options (constant) init ("000004"b3); 6 29 6 30 6 31 dcl sp pointer; /* pointer to beginning of stack frame */ 6 32 6 33 dcl stack_frame_min_length fixed bin static init(48); 6 34 6 35 6 36 dcl 1 stack_frame based(sp) aligned, 6 37 2 pointer_registers(0 : 7) ptr, 6 38 2 prev_sp pointer, 6 39 2 next_sp pointer, 6 40 2 return_ptr pointer, 6 41 2 entry_ptr pointer, 6 42 2 operator_and_lp_ptr ptr, /* serves as both */ 6 43 2 arg_ptr pointer, 6 44 2 static_ptr ptr unaligned, 6 45 2 support_ptr ptr unal, /* only used by fortran I/O */ 6 46 2 on_unit_relp1 bit(18) unaligned, 6 47 2 on_unit_relp2 bit(18) unaligned, 6 48 2 translator_id bit(18) unaligned, /* Translator ID (see constants above) 6 49* 0 => PL/I version II 6 50* 1 => ALM 6 51* 2 => PL/I version I 6 52* 3 => signal caller frame 6 53* 4 => signaller frame */ 6 54 2 operator_return_offset bit(18) unaligned, 6 55 2 x(0: 7) bit(18) unaligned, /* index registers */ 6 56 2 a bit(36), /* accumulator */ 6 57 2 q bit(36), /* q-register */ 6 58 2 e bit(36), /* exponent */ 6 59 2 timer bit(27) unaligned, /* timer */ 6 60 2 pad bit(6) unaligned, 6 61 2 ring_alarm_reg bit(3) unaligned; 6 62 6 63 6 64 dcl 1 stack_frame_flags based(sp) aligned, 6 65 2 pad(0 : 7) bit(72), /* skip over prs */ 6 66 2 xx0 bit(22) unal, 6 67 2 main_proc bit(1) unal, /* on if frame belongs to a main procedure */ 6 68 2 run_unit_manager bit(1) unal, /* on if frame belongs to run unit manager */ 6 69 2 signal bit(1) unal, /* on if frame belongs to logical signal_ */ 6 70 2 crawl_out bit(1) unal, /* on if this is a signal caller frame */ 6 71 2 signaller bit(1) unal, /* on if next frame is signaller's */ 6 72 2 link_trap bit(1) unal, /* on if this frame was made by the linker */ 6 73 2 support bit(1) unal, /* on if frame belongs to a support proc */ 6 74 2 condition bit(1) unal, /* on if condition established in this frame */ 6 75 2 xx0a bit(6) unal, 6 76 2 xx1 fixed bin, 6 77 2 xx2 fixed bin, 6 78 2 xx3 bit(25) unal, 6 79 2 old_crawl_out bit (1) unal, /* on if this is a signal caller frame */ 6 80 2 old_signaller bit(1) unal, /* on if next frame is signaller's */ 6 81 2 xx3a bit(9) unaligned, 6 82 2 xx4(9) bit(72) aligned, 6 83 2 v2_pl1_op_ret_base ptr, /* When a V2 PL/I program calls an operator the 6 84* * operator puts a pointer to the base of 6 85* * the calling procedure here. (text base ptr) */ 6 86 2 xx5 bit(72) aligned, 6 87 2 pl1_ps_ptr ptr; /* ptr to ps for this frame; also used by fio. */ 6 88 6 89 /* format: on */ 6 90 6 91 /* END INCLUDE FILE ... stack_frame.incl.pl1 */ 376 377 /* BEGIN INCLUDE FILE ... stack_header.incl.pl1 .. 3/72 Bill Silver */ 7 2 /* modified 7/76 by M. Weaver for *system links and more system use of areas */ 7 3 /* modified 3/77 by M. Weaver to add rnt_ptr */ 7 4 /* Modified April 1983 by C. Hornig for tasking */ 7 5 7 6 /****^ HISTORY COMMENTS: 7 7* 1) change(86-06-24,DGHowe), approve(86-06-24,MCR7396), 7 8* audit(86-08-05,Schroth), install(86-11-03,MR12.0-1206): 7 9* added the heap_header_ptr definition. 7 10* 2) change(86-08-12,Kissel), approve(86-08-12,MCR7473), 7 11* audit(86-10-10,Fawcett), install(86-11-03,MR12.0-1206): 7 12* Modified to support control point management. These changes were actually 7 13* made in February 1985 by G. Palter. 7 14* 3) change(86-10-22,Fawcett), approve(86-10-22,MCR7473), 7 15* audit(86-10-22,Farley), install(86-11-03,MR12.0-1206): 7 16* Remove the old_lot pointer and replace it with cpm_data_ptr. Use the 18 7 17* bit pad after cur_lot_size for the cpm_enabled. This was done to save some 7 18* space int the stack header and change the cpd_ptr unal to cpm_data_ptr 7 19* (ITS pair). 7 20* END HISTORY COMMENTS */ 7 21 7 22 /* format: style2 */ 7 23 7 24 dcl sb ptr; /* the main pointer to the stack header */ 7 25 7 26 dcl 1 stack_header based (sb) aligned, 7 27 2 pad1 (4) fixed bin, /* (0) also used as arg list by outward_call_handler */ 7 28 2 cpm_data_ptr ptr, /* (4) pointer to control point which owns this stack */ 7 29 2 combined_stat_ptr ptr, /* (6) pointer to area containing separate static */ 7 30 2 clr_ptr ptr, /* (8) pointer to area containing linkage sections */ 7 31 2 max_lot_size fixed bin (17) unal, /* (10) DU number of words allowed in lot */ 7 32 2 main_proc_invoked fixed bin (11) unal, /* (10) DL nonzero if main procedure invoked in run unit */ 7 33 2 have_static_vlas bit (1) unal, /* (10) DL "1"b if (very) large arrays are being used in static */ 7 34 2 pad4 bit (2) unal, 7 35 2 run_unit_depth fixed bin (2) unal, /* (10) DL number of active run units stacked */ 7 36 2 cur_lot_size fixed bin (17) unal, /* (11) DU number of words (entries) in lot */ 7 37 2 cpm_enabled bit (18) unal, /* (11) DL non-zero if control point management is enabled */ 7 38 2 system_free_ptr ptr, /* (12) pointer to system storage area */ 7 39 2 user_free_ptr ptr, /* (14) pointer to user storage area */ 7 40 2 null_ptr ptr, /* (16) */ 7 41 2 stack_begin_ptr ptr, /* (18) pointer to first stack frame on the stack */ 7 42 2 stack_end_ptr ptr, /* (20) pointer to next useable stack frame */ 7 43 2 lot_ptr ptr, /* (22) pointer to the lot for the current ring */ 7 44 2 signal_ptr ptr, /* (24) pointer to signal procedure for current ring */ 7 45 2 bar_mode_sp ptr, /* (26) value of sp before entering bar mode */ 7 46 2 pl1_operators_ptr ptr, /* (28) pointer to pl1_operators_$operator_table */ 7 47 2 call_op_ptr ptr, /* (30) pointer to standard call operator */ 7 48 2 push_op_ptr ptr, /* (32) pointer to standard push operator */ 7 49 2 return_op_ptr ptr, /* (34) pointer to standard return operator */ 7 50 2 return_no_pop_op_ptr 7 51 ptr, /* (36) pointer to standard return / no pop operator */ 7 52 2 entry_op_ptr ptr, /* (38) pointer to standard entry operator */ 7 53 2 trans_op_tv_ptr ptr, /* (40) pointer to translator operator ptrs */ 7 54 2 isot_ptr ptr, /* (42) pointer to ISOT */ 7 55 2 sct_ptr ptr, /* (44) pointer to System Condition Table */ 7 56 2 unwinder_ptr ptr, /* (46) pointer to unwinder for current ring */ 7 57 2 sys_link_info_ptr ptr, /* (48) pointer to *system link name table */ 7 58 2 rnt_ptr ptr, /* (50) pointer to Reference Name Table */ 7 59 2 ect_ptr ptr, /* (52) pointer to event channel table */ 7 60 2 assign_linkage_ptr ptr, /* (54) pointer to storage for (obsolete) hcs_$assign_linkage */ 7 61 2 heap_header_ptr ptr, /* (56) pointer to the heap header for this ring */ 7 62 2 trace, 7 63 3 frames, 7 64 4 count fixed bin, /* (58) number of trace frames */ 7 65 4 top_ptr ptr unal, /* (59) pointer to last trace frame */ 7 66 3 in_trace bit (36) aligned, /* (60) trace antirecursion flag */ 7 67 2 pad2 bit (36), /* (61) */ 7 68 2 pad5 pointer; /* (62) pointer to future stuff */ 7 69 7 70 /* The following offset refers to a table within the pl1 operator table. */ 7 71 7 72 dcl tv_offset fixed bin init (361) internal static; 7 73 /* (551) octal */ 7 74 7 75 7 76 /* The following constants are offsets within this transfer vector table. */ 7 77 7 78 dcl ( 7 79 call_offset fix ----------------------------------------------------------- Historical Background This edition of the Multics software materials and documentation is provided and donated to Massachusetts Institute of Technology by Group BULL including BULL HN Information Systems Inc. as a contribution to computer science knowledge. This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell BULL Inc., Groupe BULL and BULL HN Information Systems Inc. to the development of this operating system. Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for managing computer hardware properly and for executing programs. Many subsequent operating systems incorporated Multics principles. Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . ----------------------------------------------------------- Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without fee is hereby granted,provided that the below copyright notice and historical background appear in all copies and that both the copyright notice and historical background and this permission notice appear in supporting documentation, and that the names of MIT, HIS, BULL or BULL HN not be used in advertising or publicity pertaining to distribution of the programs without specific prior written permission. Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. Copyright 2006 by BULL HN Information Systems Inc. Copyright 2006 by Bull SAS All Rights Reserved