COMPILATION LISTING OF SEGMENT dump_machine_cond_ Compiled by: Multics PL/I Compiler, Release 28d, of September 14, 1983 Compiled at: Honeywell LCPD Phoenix, System M Compiled on: 10/03/83 1707.6 mst Mon Options: optimize map 1 /* *********************************************************** 2* * * 3* * Copyright, (C) Honeywell Information Systems Inc., 1982 * 4* * * 5* * Copyright (c) 1972 by Massachusetts Institute of * 6* * Technology and Honeywell Information Systems, Inc. * 7* * * 8* *********************************************************** */ 9 10 11 dump_machine_cond_: 12 procedure (cip, fsp, stream, mode); 13 14 /* DUMP_MACHINE_COND_ - Print out pretty machine conditions at time of fault. 15* 16* This routine can be called with the arguments given it by a condition handler 17* or those returned by find_fault_frame_. 18* 19* It uses the default_error_handler_ routine reinterpret_condition_ and 20* then attempts to print the source line, followed by the machine registers. 21**/ 22 23 dcl cip ptr, /* ptr to structure returned by find_condition_info_ */ 24 fsp ptr, /* fault sp */ 25 stream char (32) aligned, /* output stream name */ 26 mode fixed bin; /* output mode: 0 = brief */ 27 28 dcl shortinfo char (8) aligned, /* returned by convert_status_code_ */ 29 (i, j, k) fixed bin, /* counters */ 30 time char (32) aligned, 31 NL char (1) aligned int static init (" 32 "), 33 strp ptr, /* ptr to interpret_ptr_struc */ 34 longinfo char (100) aligned, /* ... explanation of error code in SCU */ 35 prs (0:7) char (4) int static options (constant) 36 init ("(ap)", "(ab)", "(bp)", "(bb)", "(lp)", "(lb)", "(sp)", "(sb)"), 37 (tp, tp1) ptr, /* working pointers */ 38 areap ptr, /* pointer to area, where message allocated */ 39 mp ptr, /* ptr to message, explains fault */ 40 ml fixed bin, /* length of message (see berrm) */ 41 berrm char (ml) based (mp), /* message from reinterpret_condition_ */ 42 barea area ((100)) based (areap), /* dummy for free */ 43 w (8) fixed bin based, /* based words, for regs */ 44 ec fixed bin (35), /* error code, from scu */ 45 faultptr ptr, /* ptr to fault */ 46 iocbp ptr, /* io control block ptr */ 47 faultsp ptr; /* stack ptr at time of fault */ 48 49 dcl 1 condinfo based (cip) aligned, /* structure returned by find_condition_info_ */ 50 2 mcptr ptr, 51 2 version fixed bin, 52 2 condition_name char (32) var, 53 2 infoptr ptr, 54 2 wcptr ptr, 55 2 loc_ptr ptr, 56 2 flags, 57 3 crawlout bit (1) unal, 58 3 pad1 bit (35) unal, 59 2 user_loc_ptr ptr, 60 2 pad (4) bit (36); 61 62 dcl interpret_ptr_ entry (ptr, ptr, ptr), 63 interpret_ptr_$frame_owner entry (ptr, ptr, ptr), 64 print_source_line_ entry (ptr, char (32) aligned), 65 reinterpret_condition_ entry (ptr, ptr, fixed bin, fixed bin, ptr, char (*) aligned, ptr, ptr, ptr), 66 get_system_free_area_ entry (ptr), 67 convert_status_code_ entry (fixed bin (35), char (8) aligned, char (100) aligned), 68 prtscu_$on_line entry (ptr, ptr, bit (1)), 69 iox_$find_iocb entry (char (*), ptr, fixed bin (35)), 70 date_time_ entry (fixed bin (71), char (*) aligned), 71 ioa_$rsnnl entry options (variable), 72 ioa_$ioa_stream entry options (variable); 73 1 1 /* BEGIN INCLUDE FILE ... interpret_ptr_struc.incl.pl1 */ 1 2 1 3 dcl 1 struc based (strp) aligned, /* This useful structure is in trace_stack pgms */ 1 4 2 comment char (64), /* name of boundseg, or thing pointed to, or .. */ 1 5 2 segment char (32), /* name of segment, or segment number with # */ 1 6 2 entryn char (33), /* entry name, preceded by $, or blank */ 1 7 2 offset char (6), /* offset in segment, or blank */ 1 8 2 opname char (32), /* may be pl1 operator name */ 1 9 2 ring char (1) unal, /* ring number of ptr */ 1 10 2 std_flag bit (1) unal, /* TRUE if std object. */ 1 11 2 xpad bit (26) unal, 1 12 2 bitoff char (4), /* bit offset */ 1 13 2 modifier char (8), /* ptr modifier, or special code like "noaccess" */ 1 14 2 symbolp ptr, /* ptr to symbol section */ 1 15 2 instruction_counter fixed bin, /* binary instruction counter */ 1 16 2 sourcemap fixed bin, /* source map offset in symbol section */ 1 17 2 compiler char (8), /* name of compiler */ 1 18 2 text_ptr ptr, /* ptr to segment text */ 1 19 2 stack_ptr ptr; /* ptr to stack frame */ 1 20 1 21 dcl 1 strbuf aligned like struc; /* If referenced, will make storage for struc */ 1 22 1 23 /* END INCLUDE FILE ... interpret_ptr_struc.incl.pl1 */ 74 75 2 1 /* */ 2 2 /* BEGIN INCLUDE FILE mc.incl.pl1 Created Dec 72 for 6180 - WSS. */ 2 3 /* Modified 06/07/76 by Greenberg for mc.resignal */ 2 4 /* Modified 07/07/76 by Morris for fault register data */ 2 5 /* Modified 08/28/80 by J. A. Bush for the DPS8/70M CVPU */ 2 6 /* Modified '82 to make values constant */ 2 7 2 8 /* words 0-15 pointer registers */ 2 9 2 10 dcl mcp ptr; 2 11 2 12 dcl 1 mc based (mcp) aligned, 2 13 2 prs (0:7) ptr, /* POINTER REGISTERS */ 2 14 (2 regs, /* registers */ 2 15 3 x (0:7) bit (18), /* index registers */ 2 16 3 a bit (36), /* accumulator */ 2 17 3 q bit (36), /* q-register */ 2 18 3 e bit (8), /* exponent */ 2 19 3 pad1 bit (28), 2 20 3 t bit (27), /* timer register */ 2 21 3 pad2 bit (6), 2 22 3 ralr bit (3), /* ring alarm register */ 2 23 2 24 2 scu (0:7) bit (36), 2 25 2 26 2 mask bit (72), /* mem controller mask at time of fault */ 2 27 2 ips_temp bit (36), /* Temporary storage for IPS info */ 2 28 2 errcode fixed bin (35), /* fault handler's error code */ 2 29 2 fim_temp, 2 30 3 unique_index bit (18) unal, /* unique index for restarting faults */ 2 31 3 resignal bit (1) unal, /* recompute signal name with fcode below */ 2 32 3 fcode bit (17) unal, /* fault code used as index to FIM table and SCT */ 2 33 2 fault_reg bit (36), /* fault register */ 2 34 2 pad2 bit (1), 2 35 2 cpu_type fixed bin (2) unsigned, /* L68 = 0, DPS8/70M = 1 */ 2 36 2 ext_fault_reg bit (15), /* extended fault reg for DPS8/70M CPU */ 2 37 2 fault_time bit (54), /* time of fault */ 2 38 2 39 2 eis_info (0:7) bit (36)) unaligned; 2 40 2 41 2 42 dcl (apx fixed bin init (0), 2 43 abx fixed bin init (1), 2 44 bpx fixed bin init (2), 2 45 bbx fixed bin init (3), 2 46 lpx fixed bin init (4), 2 47 lbx fixed bin init (5), 2 48 spx fixed bin init (6), 2 49 sbx fixed bin init (7)) internal static options (constant); 2 50 2 51 2 52 2 53 2 54 dcl scup ptr; 2 55 2 56 dcl 1 scu based (scup) aligned, /* SCU DATA */ 2 57 2 58 2 59 /* WORD (0) */ 2 60 2 61 (2 ppr, /* PROCEDURE POINTER REGISTER */ 2 62 3 prr bit (3), /* procedure ring register */ 2 63 3 psr bit (15), /* procedure segment register */ 2 64 3 p bit (1), /* procedure privileged bit */ 2 65 2 66 2 apu, /* APPENDING UNIT STATUS */ 2 67 3 xsf bit (1), /* ext seg flag - IT modification */ 2 68 3 sdwm bit (1), /* match in SDW Ass. Mem. */ 2 69 3 sd_on bit (1), /* SDW Ass. Mem. ON */ 2 70 3 ptwm bit (1), /* match in PTW Ass. Mem. */ 2 71 3 pt_on bit (1), /* PTW Ass. Mem. ON */ 2 72 3 pi_ap bit (1), /* Instr Fetch or Append cycle */ 2 73 3 dsptw bit (1), /* Fetch of DSPTW */ 2 74 3 sdwnp bit (1), /* Fetch of SDW non paged */ 2 75 3 sdwp bit (1), /* Fetch of SDW paged */ 2 76 3 ptw bit (1), /* Fetch of PTW */ 2 77 3 ptw2 bit (1), /* Fetch of pre-paged PTW */ 2 78 3 fap bit (1), /* Fetch of final address paged */ 2 79 3 fanp bit (1), /* Fetch of final address non-paged */ 2 80 3 fabs bit (1), /* Fetch of final address absolute */ 2 81 2 82 2 fault_cntr bit (3), /* number of retrys of EIS instructions */ 2 83 2 84 2 85 /* WORD (1) */ 2 86 2 87 2 fd, /* FAULT DATA */ 2 88 3 iro bit (1), /* illegal ring order */ 2 89 3 oeb bit (1), /* out of execute bracket */ 2 90 3 e_off bit (1), /* no execute */ 2 91 3 orb bit (1), /* out of read bracket */ 2 92 3 r_off bit (1), /* no read */ 2 93 3 owb bit (1), /* out of write bracket */ 2 94 3 w_off bit (1), /* no write */ 2 95 3 no_ga bit (1), /* not a gate */ 2 96 3 ocb bit (1), /* out of call bracket */ 2 97 3 ocall bit (1), /* outward call */ 2 98 3 boc bit (1), /* bad outward call */ 2 99 3 inret bit (1), /* inward return */ 2 100 3 crt bit (1), /* cross ring transfer */ 2 101 3 ralr bit (1), /* ring alarm register */ 2 102 3 am_er bit (1), /* associative memory fault */ 2 103 3 oosb bit (1), /* out of segment bounds */ 2 104 3 paru bit (1), /* processor parity upper */ 2 105 3 parl bit (1), /* processor parity lower */ 2 106 3 onc_1 bit (1), /* op not complete type 1 */ 2 107 3 onc_2 bit (1), /* op not complete type 2 */ 2 108 2 109 2 port_stat, /* PORT STATUS */ 2 110 3 ial bit (4), /* illegal action lines */ 2 111 3 iac bit (3), /* illegal action channel */ 2 112 3 con_chan bit (3), /* connect channel */ 2 113 2 114 2 fi_num bit (5), /* (fault/interrupt) number */ 2 115 2 fi_flag bit (1), /* 1 => fault, 0 => interrupt */ 2 116 2 117 2 118 /* WORD (2) */ 2 119 2 120 2 tpr, /* TEMPORARY POINTER REGISTER */ 2 121 3 trr bit (3), /* temporary ring register */ 2 122 3 tsr bit (15), /* temporary segment register */ 2 123 2 124 2 pad2 bit (9), 2 125 2 126 2 cpu_no bit (3), /* CPU number */ 2 127 2 128 2 delta bit (6), /* tally modification DELTA */ 2 129 2 130 2 131 /* WORD (3) */ 2 132 2 133 2 word3 bit (18), 2 134 2 135 2 tsr_stat, /* TSR STATUS for 1,2,&3 word instructions */ 2 136 3 tsna, /* Word 1 status */ 2 137 4 prn bit (3), /* Word 1 PR number */ 2 138 4 prv bit (1), /* Word 1 PR valid bit */ 2 139 3 tsnb, /* Word 2 status */ 2 140 4 prn bit (3), /* Word 2 PR number */ 2 141 4 prv bit (1), /* Word 2 PR valid bit */ 2 142 3 tsnc, /* Word 3 status */ 2 143 4 prn bit (3), /* Word 3 PR number */ 2 144 4 prv bit (1), /* Word 3 PR valid bit */ 2 145 2 146 2 tpr_tbr bit (6), /* TPR.TBR field */ 2 147 2 148 2 149 /* WORD (4) */ 2 150 2 151 2 ilc bit (18), /* INSTRUCTION COUNTER */ 2 152 2 153 2 ir, /* INDICATOR REGISTERS */ 2 154 3 zero bit (1), /* zero indicator */ 2 155 3 neg bit (1), /* negative indicator */ 2 156 3 carry bit (1), /* carryry indicator */ 2 157 3 ovfl bit (1), /* overflow indicator */ 2 158 3 eovf bit (1), /* eponent overflow */ 2 159 3 eufl bit (1), /* exponent underflow */ 2 160 3 oflm bit (1), /* overflow mask */ 2 161 3 tro bit (1), /* tally runout */ 2 162 3 par bit (1), /* parity error */ 2 163 3 parm bit (1), /* parity mask */ 2 164 3 bm bit (1), /* ^bar mode */ 2 165 3 tru bit (1), /* truncation mode */ 2 166 3 mif bit (1), /* multi-word instruction mode */ 2 167 3 abs bit (1), /* absolute mode */ 2 168 3 pad bit (4), 2 169 2 170 2 171 /* WORD (5) */ 2 172 2 173 2 ca bit (18), /* COMPUTED ADDRESS */ 2 174 2 175 2 cu, /* CONTROL UNIT STATUS */ 2 176 3 rf bit (1), /* on first cycle of repeat instr */ 2 177 3 rpt bit (1), /* repeat instruction */ 2 178 3 rd bit (1), /* repeat double instruction */ 2 179 3 rl bit (1), /* repeat link instruciton */ 2 180 3 pot bit (1), /* IT modification */ 2 181 3 pon bit (1), /* return type instruction */ 2 182 3 xde bit (1), /* XDE from Even location */ 2 183 3 xdo bit (1), /* XDE from Odd location */ 2 184 3 poa bit (1), /* operation preparation */ 2 185 3 rfi bit (1), /* tells CPU to refetch instruction */ 2 186 3 its bit (1), /* ITS modification */ 2 187 3 if bit (1), /* fault occured during instruction fetch */ 2 188 2 189 2 cpu_tag bit (6)) unaligned, /* computed tag field */ 2 190 2 191 2 192 /* WORDS (6,7) */ 2 193 2 194 2 even_inst bit (36), /* even instruction of faulting pair */ 2 195 2 196 2 odd_inst bit (36); /* odd instruction of faulting pair */ 2 197 2 198 2 199 2 200 2 201 2 202 2 203 /* ALTERNATE SCU DECLARATION */ 2 204 2 205 2 206 dcl 1 scux based (scup) aligned, 2 207 2 208 (2 pad0 bit (36), 2 209 2 210 2 fd, /* GROUP II FAULT DATA */ 2 211 3 isn bit (1), /* illegal segment number */ 2 212 3 ioc bit (1), /* illegal op code */ 2 213 3 ia_am bit (1), /* illegal address - modifier */ 2 214 3 isp bit (1), /* illegal slave procedure */ 2 215 3 ipr bit (1), /* illegal procedure */ 2 216 3 nea bit (1), /* non existent address */ 2 217 3 oobb bit (1), /* out of bounds */ 2 218 3 pad bit (29), 2 219 2 220 2 pad2 bit (36), 2 221 2 222 2 pad3a bit (18), 2 223 2 224 2 tsr_stat (0:2), /* TSR STATUS as an ARRAY */ 2 225 3 prn bit (3), /* PR number */ 2 226 3 prv bit (1), /* PR valid bit */ 2 227 2 228 2 pad3b bit (6)) unaligned, 2 229 2 230 2 pad45 (0:1) bit (36), 2 231 2 232 2 instr (0:1) bit (36); /* Instruction ARRAY */ 2 233 2 234 2 235 2 236 /* END INCLUDE FILE mc.incl.pl1 */ 76 77 78 dcl (addr, fixed, index, null, rel, substr, verify) builtin; 79 80 /* ------------------------------------------------------- */ 81 82 strp = addr (strbuf); /* initialization. */ 83 faultsp = fsp; /* ..copy args */ 84 mcp = condinfo.mcptr; 85 if condinfo.flags.crawlout 86 then if condinfo.wcptr ^= null then mcp = condinfo.wcptr; 87 88 if mode = 0 then do; /* brief mode */ 89 call ioa_$ioa_stream (stream, "^a condition:", condinfo.condition_name); 90 return; 91 end; 92 93 call get_system_free_area_ (areap); /* obtain area for message */ 94 95 /* This section gets the standard error message which explains the error, and prints it. */ 96 97 call reinterpret_condition_ (areap, mp, ml, 3, condinfo.mcptr, (condinfo.condition_name), condinfo.wcptr, 98 condinfo.infoptr, faultsp); 99 j = 1; /* got explanation of fault. now print it */ 100 i = index (berrm, "Error"); /* take off "error" */ 101 if i > 0 102 then if i < 4 then j = i + 6; /* .. if it's on the front */ 103 j = j + verify (substr (berrm, j), " ") - 1; /* Trim leading blanks. */ 104 105 do k = j repeat k + i while (k < ml); /* Print the error message. */ 106 i = index (substr (berrm, k), NL); /* .. one line at a time. */ 107 call ioa_$ioa_stream (stream, "^a", substr (berrm, k, i - 1)); 108 end; 109 free berrm in (barea); /* done with error msg. free it */ 110 if mode = 0 then go to exit; /* no registers if brief mode */ 111 if mcp = null then do; /* might be given null. */ 112 call ioa_$ioa_stream (stream, "Machine conditions not available.^/"); 113 return; 114 end; 115 scup = addr (mc.scu); 116 117 /* This section attempts to print the source statement which encountered the fault. */ 118 119 faultptr = condinfo.user_loc_ptr; 120 call interpret_ptr_$frame_owner (faultptr, faultsp, strp); 121 if struc.text_ptr ^= null 122 then /* if can print source line, do so. */ 123 call print_source_line_ (strp, stream); 124 125 /* This section formats the machine conditions and prints them out pretty. */ 126 127 call ioa_$ioa_stream (stream, "^/Machine registers at time of fault^/"); 128 p_mc_only: /* common code for mc_only entry */ 129 do j = 0 to 7; 130 call printreg (j); 131 end; 132 call ioa_$ioa_stream (stream, ""); 133 134 call ioa_$ioa_stream (stream, "x0 ^6o^3xx1 ^6o^3xx2 ^6o^3xx3 ^6o", fixed (mc.x (0), 18), fixed (mc.x (1), 18), 135 fixed (mc.x (2), 18), fixed (mc.x (3), 18)); 136 call ioa_$ioa_stream (stream, "x4 ^6o^3xx5 ^6o^3xx6 ^6o^3xx7 ^6o", fixed (mc.x (4), 18), fixed (mc.x (5), 18), 137 fixed (mc.x (6), 18), fixed (mc.x (7), 18)); 138 call ioa_$ioa_stream (stream, "a ^w q ^w e ^o", fixed (mc.a, 35), fixed (mc.q, 35), fixed (mc.e, 8)); 139 call ioa_$ioa_stream (stream, "Timer reg - ^o, Ring alarm reg - ^1.3b", fixed (mc.regs.t, 27), mc.regs.ralr); 140 if mc.fault_reg ^= "0"b 141 then /* display fault reg if present */ 142 call ioa_$ioa_stream (stream, "Fault reg - ^12.3b", mc.fault_reg); 143 144 call ioa_$ioa_stream (stream, "^/SCU Data:^/"); 145 call iox_$find_iocb ((stream), iocbp, ec); /* find iocb ptr */ 146 call prtscu_$on_line (iocbp, scup, "1"b); 147 call ioa_$ioa_stream (stream, " "); /* Put out new line char */ 148 if mc.fault_time then do; /* print out time of day if available */ 149 call date_time_ (fixed (mc.fault_time, 71), time); 150 call ioa_$ioa_stream (stream, "Time stored: ^a (^18.3b)", time, mc.fault_time); 151 end; 152 call ioa_$ioa_stream (stream, "Ring:^10x^d", fixed (scu.ppr.prr, 3)); 153 ec = mc.errcode; 154 if ec ^= 0 then do; /* Interpret code. */ 155 call convert_status_code_ (ec, shortinfo, longinfo); 156 if shortinfo = (8)"x" then call ioa_$rsnnl ("^w", longinfo, i, ec); 157 call ioa_$ioa_stream (stream, "Code:^10x^a", longinfo); 158 end; 159 160 if substr (scu.even_inst, 28, 1) then do; /* if bit 27 of instruction on display spl data */ 161 call ioa_$ioa_stream (stream, "^/EIS Pointers and Lengths:^/"); 162 tp1 = addr (mc.eis_info); /* set up pointer */ 163 call ioa_$ioa_stream (stream, "^6o^-^w ^w ^w ^w^/^-^w ^w ^w ^w", fixed (rel (tp1)), tp1 -> w (1), 164 tp1 -> w (2), tp1 -> w (3), tp1 -> w (4), tp1 -> w (5), tp1 -> w (6), tp1 -> w (7), tp1 -> w (8)); 165 end; 166 exit: 167 call ioa_$ioa_stream (stream, ""); 168 return; 169 170 /* -------------------------------------------------------- */ 171 172 /* mc_only - entry to display a set of machine conditions only */ 173 174 mc_only: 175 entry (a_mcp, stream); 176 dcl a_mcp ptr; /* machine condition pointer */ 177 178 mcp = a_mcp; /* copy arguments */ 179 strp = addr (strbuf); 180 scup = addr (mc.scu); 181 go to p_mc_only; /* join common code */ 182 183 184 185 printreg: 186 proc (v1); 187 188 dcl v1 fixed bin; 189 190 dcl tpx char (20) aligned; 191 dcl tpxi fixed bin; 192 193 tp = mc.prs (v1); 194 call ioa_$rsnnl ("^p", tpx, tpxi, tp); 195 call interpret_ptr_ (tp, null, strp); 196 call ioa_$ioa_stream (stream, "pr^d ^4a^2x^20a^a^a|^a ^a ^a", v1, prs (v1), tpx, struc.segment, struc.entryn, 197 struc.offset, struc.modifier, struc.comment); 198 199 end printreg; 200 201 202 end dump_machine_cond_; SOURCE FILES USED IN THIS COMPILATION. LINE NUMBER DATE MODIFIED NAME PATHNAME 0 10/03/83 1009.5 dump_machine_cond_.pl1 >spec>on>pl128d>dump_machine_cond_.pl1 74 1 06/11/74 0602.3 interpret_ptr_struc.incl.pl1 >ldd>include>interpret_ptr_struc.incl.pl1 76 2 08/17/83 1135.7 mc.incl.pl1 >ldd>include>mc.incl.pl1 NAMES DECLARED IN THIS COMPILATION. IDENTIFIER OFFSET LOC STORAGE CLASS DATA TYPE ATTRIBUTES AND REFERENCES (* indicates a set context) NAMES DECLARED BY DECLARE STATEMENT. NL constant char(1) initial dcl 28 ref 106 a 24 based bit(36) level 3 packed unaligned dcl 2-12 ref 138 138 a_mcp parameter pointer dcl 176 ref 174 178 addr builtin function dcl 78 ref 82 115 162 179 180 areap 000156 automatic pointer dcl 28 set ref 93* 97* 109 barea based area(100) dcl 28 ref 109 berrm based char unaligned dcl 28 ref 100 103 106 107 107 109 cip parameter pointer dcl 23 ref 11 84 85 85 85 89 97 97 97 97 119 comment based char(64) level 2 dcl 1-3 set ref 196* condinfo based structure level 1 dcl 49 condition_name 3 based varying char(32) level 2 dcl 49 set ref 89* 97 convert_status_code_ 000022 constant entry external dcl 62 ref 155 crawlout 22 based bit(1) level 3 packed unaligned dcl 49 ref 85 date_time_ 000030 constant entry external dcl 62 ref 149 e 26 based bit(8) level 3 packed unaligned dcl 2-12 ref 138 138 ec 000163 automatic fixed bin(35,0) dcl 28 set ref 145* 153* 154 155* 156* eis_info 50 based bit(36) array level 2 packed unaligned dcl 2-12 set ref 162 entryn 30 based char(33) level 2 dcl 1-3 set ref 196* errcode 43 based fixed bin(35,0) level 2 packed unaligned dcl 2-12 ref 153 even_inst 6 based bit(36) level 2 dcl 2-56 ref 160 fault_reg 45 based bit(36) level 2 packed unaligned dcl 2-12 set ref 140 140* fault_time 46(18) based bit(54) level 2 packed unaligned dcl 2-12 set ref 148 149 149 150* faultptr 000164 automatic pointer dcl 28 set ref 119* 120* faultsp 000170 automatic pointer dcl 28 set ref 83* 97* 120* fixed builtin function dcl 78 ref 134 134 134 134 134 134 134 134 136 136 136 136 136 136 136 136 138 138 138 138 138 138 139 139 149 149 152 152 163 163 flags 22 based structure level 2 dcl 49 fsp parameter pointer dcl 23 ref 11 83 get_system_free_area_ 000020 constant entry external dcl 62 ref 93 i 000102 automatic fixed bin(17,0) dcl 28 set ref 100* 101 101 101 106* 107 107 108 156* index builtin function dcl 78 ref 100 106 infoptr 14 based pointer level 2 dcl 49 set ref 97* interpret_ptr_ 000010 constant entry external dcl 62 ref 195 interpret_ptr_$frame_owner 000012 constant entry external dcl 62 ref 120 ioa_$ioa_stream 000034 constant entry external dcl 62 ref 89 107 112 127 132 134 136 138 139 140 144 147 150 152 157 161 163 166 196 ioa_$rsnnl 000032 constant entry external dcl 62 ref 156 194 iocbp 000166 automatic pointer dcl 28 set ref 145* 146* iox_$find_iocb 000026 constant entry external dcl 62 ref 145 j 000103 automatic fixed bin(17,0) dcl 28 set ref 99* 101* 103* 103 103 105 128* 130* k 000104 automatic fixed bin(17,0) dcl 28 set ref 105* 105* 106 107 107* 108 longinfo 000120 automatic char(100) dcl 28 set ref 155* 156* 157* mc based structure level 1 dcl 2-12 mcp 000264 automatic pointer dcl 2-10 set ref 84* 85* 111 115 134 134 134 134 134 134 134 134 136 136 136 136 136 136 136 136 138 138 138 138 138 138 139 139 139 140 140 148 149 149 150 153 162 178* 180 193 mcptr based pointer level 2 dcl 49 set ref 84 97* ml 000162 automatic fixed bin(17,0) dcl 28 set ref 97* 100 103 105 106 107 107 109 109 mode parameter fixed bin(17,0) dcl 23 ref 11 88 110 modifier 55 based char(8) level 2 dcl 1-3 set ref 196* mp 000160 automatic pointer dcl 28 set ref 97* 100 103 106 107 107 109 null builtin function dcl 78 ref 85 111 121 195 195 offset 41 based char(6) level 2 dcl 1-3 set ref 196* ppr based structure level 2 packed unaligned dcl 2-56 print_source_line_ 000014 constant entry external dcl 62 ref 121 prr based bit(3) level 3 packed unaligned dcl 2-56 ref 152 152 prs 000000 constant char(4) initial array unaligned dcl 28 in procedure "dump_machine_cond_" set ref 196* prs based pointer array level 2 in structure "mc" dcl 2-12 in procedure "dump_machine_cond_" ref 193 prtscu_$on_line 000024 constant entry external dcl 62 ref 146 q 25 based bit(36) level 3 packed unaligned dcl 2-12 ref 138 138 ralr 27(33) based bit(3) level 3 packed unaligned dcl 2-12 set ref 139* regs 20 based structure level 2 packed unaligned dcl 2-12 reinterpret_condition_ 000016 constant entry external dcl 62 ref 97 rel builtin function dcl 78 ref 163 163 scu based structure level 1 dcl 2-56 in procedure "dump_machine_cond_" scu 30 based bit(36) array level 2 in structure "mc" packed unaligned dcl 2-12 in procedure "dump_machine_cond_" set ref 115 180 scup 000266 automatic pointer dcl 2-54 set ref 115* 146* 152 152 160 180* segment 20 based char(32) level 2 dcl 1-3 set ref 196* shortinfo 000100 automatic char(8) dcl 28 set ref 155* 156 strbuf 000172 automatic structure level 1 dcl 1-21 set ref 82 179 stream parameter char(32) dcl 23 set ref 11 89* 107* 112* 121* 127* 132* 134* 136* 138* 139* 140* 144* 145 147* 150* 152* 157* 161* 163* 166* 174 196* strp 000116 automatic pointer dcl 28 set ref 82* 120* 121 121* 179* 195* 196 196 196 196 196 struc based structure level 1 dcl 1-3 substr builtin function dcl 78 ref 103 106 107 107 160 t 27 based bit(27) level 3 packed unaligned dcl 2-12 ref 139 139 text_ptr 66 based pointer level 2 dcl 1-3 ref 121 time 000105 automatic char(32) dcl 28 set ref 149* 150* tp 000152 automatic pointer dcl 28 set ref 193* 194* 195* tp1 000154 automatic pointer dcl 28 set ref 162* 163 163 163 163 163 163 163 163 163 163 tpx 000300 automatic char(20) dcl 190 set ref 194* 196* tpxi 000305 automatic fixed bin(17,0) dcl 191 set ref 194* user_loc_ptr 24 based pointer level 2 dcl 49 ref 119 v1 parameter fixed bin(17,0) dcl 188 set ref 185 193 196* 196 verify builtin function dcl 78 ref 103 w based fixed bin(17,0) array dcl 28 set ref 163* 163* 163* 163* 163* 163* 163* 163* wcptr 16 based pointer level 2 dcl 49 set ref 85 85 97* x 20 based bit(18) array level 3 packed unaligned dcl 2-12 ref 134 134 134 134 134 134 134 134 136 136 136 136 136 136 136 136 NAMES DECLARED BY DECLARE STATEMENT AND NEVER REFERENCED. abx internal static fixed bin(17,0) initial dcl 2-42 apx internal static fixed bin(17,0) initial dcl 2-42 bbx internal static fixed bin(17,0) initial dcl 2-42 bpx internal static fixed bin(17,0) initial dcl 2-42 lbx internal static fixed bin(17,0) initial dcl 2-42 lpx internal static fixed bin(17,0) initial dcl 2-42 sbx internal static fixed bin(17,0) initial dcl 2-42 scux based structure level 1 dcl 2-206 spx internal static fixed bin(17,0) initial dcl 2-42 NAMES DECLARED BY EXPLICIT CONTEXT. dump_machine_cond_ 000230 constant entry external dcl 11 exit 001570 constant label dcl 166 ref 110 mc_only 001612 constant entry external dcl 174 p_mc_only 000642 constant label dcl 128 ref 181 printreg 001633 constant entry internal dcl 185 ref 130 THERE WERE NO NAMES DECLARED BY CONTEXT OR IMPLICATION. STORAGE REQUIREMENTS FOR THIS PROGRAM. Object Text Link Symbol Defs Static Start 0 0 2154 2212 1776 2164 Length 2450 1776 36 221 155 0 BLOCK NAME STACK SIZE TYPE WHY NONQUICK/WHO SHARES STACK FRAME dump_machine_cond_ 370 external procedure is an external procedure. printreg internal procedure shares stack frame of external procedure dump_machine_cond_. STORAGE FOR AUTOMATIC VARIABLES. STACK FRAME LOC IDENTIFIER BLOCK NAME dump_machine_cond_ 000100 shortinfo dump_machine_cond_ 000102 i dump_machine_cond_ 000103 j dump_machine_cond_ 000104 k dump_machine_cond_ 000105 time dump_machine_cond_ 000116 strp dump_machine_cond_ 000120 longinfo dump_machine_cond_ 000152 tp dump_machine_cond_ 000154 tp1 dump_machine_cond_ 000156 areap dump_machine_cond_ 000160 mp dump_machine_cond_ 000162 ml dump_machine_cond_ 000163 ec dump_machine_cond_ 000164 faultptr dump_machine_cond_ 000166 iocbp dump_machine_cond_ 000170 faultsp dump_machine_cond_ 000172 strbuf dump_machine_cond_ 000264 mcp dump_machine_cond_ 000266 scup dump_machine_cond_ 000300 tpx printreg 000305 tpxi printreg THE FOLLOWING EXTERNAL OPERATORS ARE USED BY THIS PROGRAM. alloc_cs call_ext_out_desc call_ext_out return shorten_stack ext_entry set_cs_eis index_cs_eis free_based THE FOLLOWING EXTERNAL ENTRIES ARE CALLED BY THIS PROGRAM. convert_status_code_ date_time_ get_system_free_area_ interpret_ptr_ interpret_ptr_$frame_owner ioa_$ioa_stream ioa_$rsnnl iox_$find_iocb print_source_line_ prtscu_$on_line reinterpret_condition_ NO EXTERNAL VARIABLES ARE USED BY THIS PROGRAM. LINE LOC LINE LOC LINE LOC LINE LOC LINE LOC LINE LOC LINE LOC 11 000223 82 000240 83 000242 84 000245 85 000251 88 000263 89 000265 90 000311 93 000312 97 000320 99 000400 100 000403 101 000412 103 000417 105 000442 106 000447 107 000466 108 000521 109 000525 110 000532 111 000535 112 000541 113 000561 115 000562 119 000565 120 000571 121 000604 127 000622 128 000642 130 000647 131 000651 132 000653 134 000670 136 000742 138 001014 139 001062 140 001120 144 001152 145 001173 146 001220 147 001235 148 001254 149 001261 150 001300 152 001332 153 001363 154 001366 155 001367 156 001402 157 001434 160 001461 161 001465 162 001505 163 001510 166 001570 168 001605 174 001606 178 001622 179 001626 180 001630 181 001632 185 001633 193 001635 194 001642 195 001671 196 001706 199 001770 ----------------------------------------------------------- Historical Background This edition of the Multics software materials and documentation is provided and donated to Massachusetts Institute of Technology by Group BULL including BULL HN Information Systems Inc. as a contribution to computer science knowledge. This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell BULL Inc., Groupe BULL and BULL HN Information Systems Inc. to the development of this operating system. Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for managing computer hardware properly and for executing programs. Many subsequent operating systems incorporated Multics principles. Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . ----------------------------------------------------------- Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without fee is hereby granted,provided that the below copyright notice and historical background appear in all copies and that both the copyright notice and historical background and this permission notice appear in supporting documentation, and that the names of MIT, HIS, BULL or BULL HN not be used in advertising or publicity pertaining to distribution of the programs without specific prior written permission. Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. Copyright 2006 by BULL HN Information Systems Inc. Copyright 2006 by Bull SAS All Rights Reserved