COMPILATION LISTING OF SEGMENT !BBBJXkdmpPfLZP Compiled by: Multics PL/I Compiler, Release 31a, of October 12, 1988 Compiled at: Honeywell Bull, Phoenix AZ, SysM Compiled on: 10/14/88 1313.7 mst Fri Options: table map 1 /* *********************************************************** 2* * * 3* * Copyright, (C) Honeywell Bull Inc., 1988 * 4* * * 5* * Copyright, (C) Honeywell Information Systems Inc., 1982 * 6* * * 7* * Copyright (c) 1972 by Massachusetts Institute of * 8* * Technology and Honeywell Information Systems, Inc. * 9* * * 10* *********************************************************** */ 11 12 13 14 15 16 /* HISTORY COMMENTS: 17* 1) change(88-07-27,Farley), approve(88-10-05,MCR7968), 18* audit(88-10-10,Beattie), install(88-10-14,MR12.2-1166): 19* Added message for new rcerr_addscu_memoverlap error. 20* END HISTORY COMMENTS */ 21 22 23 rc_messages: proc; 24 25 /* This data base includes the messages that are reported during dynamic reconfiguration 26* of system controllers and processors. 27* 28* The data base consists of a two dimensional array of character strings. The first 29* dimension indicates the type of reconfiguration command as follows: 30* 31* * 0 general 32* * 1 add cpu 33* * 2 dl cpu 34* * 3 add mem 35* * 4 dl mem 36* * 5 add page 37* * 6 dl page 38* 39* The second dimension is controlled by the particular reconfiguration request. 40* 41* Modified March 1976 by Steve Webber --- Initial coding 42* Modified Feb 1979 by BSG for 8-cpu port expander 43* Modified Dec 1979 by Mike Grady for new add scu message 44* Modified August 1984 by Chris Jones for new reconfiguration commands 45**/ 46 47 /* Automatic */ 48 49 dcl 1 cdsa aligned like cds_args; 50 dcl code fixed bin (35); 51 dcl 1 rc_messages_array aligned, 52 2 rc_messages (0:7, 11) char (64) aligned; 53 dcl (addr, null, size, string) builtin; 54 55 /* Entries */ 56 57 dcl create_data_segment_ entry (ptr, fixed bin (35)); 58 59 /* Now begins the initialization */ 60 61 string (rc_messages_array) = ""; 62 63 rc_messages (0, rcerr_locked - 11) = "Reconfiguration database is locked."; 64 rc_messages (0, rcerr_online - 11) = "^a is already online."; 65 rc_messages (0, rcerr_no_config - 11) = "^a is not configured."; 66 rc_messages (0, rcerr_not_online - 11) = "^a is not online."; 67 rc_messages (0, rcerr_range - 11) = "Request is not within range of a single controller."; 68 rc_messages (0, rcerr_sprq_failed - 11) = "Could not set CPU required."; 69 70 rc_messages (1, rcerr_addcpu_no_response) = "No response from ^a."; 71 rc_messages (1, rcerr_addcpu_bad_switches) = "The following switches on ^a are set incorrectly: ^a"; 72 rc_messages (1, rcerr_addcpu_trouble) = "Trouble fault trying to start ^a."; 73 rc_messages (1, rcerr_addcpu_startup) = "Startup fault trying to start ^a."; 74 rc_messages (1, rcerr_addcpu_lockup) = "Lockup fault trying to start ^a."; 75 rc_messages (1, rcerr_addcpu_gcos) = "^a is not in Multics mode."; 76 rc_messages (1, rcerr_addcpu_amoff) = "Associative memories not enabled on ^a."; 77 rc_messages (1, rcerr_addcpu_enable) = "^a is not enabled at MEM ^a."; 78 79 rc_messages (2, rcerr_delcpu_no_stop) = "Cannot stop ^a."; 80 rc_messages (2, rcerr_delcpu_last) = "^a is the only CPU."; 81 rc_messages (2, rcerr_delcpu_no_good_blcpu) = "No acceptable bootload CPU would be left."; 82 83 rc_messages (3, rcerr_addscu_size) = "Size of ^a disagrees with CPU switches."; 84 rc_messages (3, rcerr_addscu_dup_mask) = "^a has duplicate mask assignments to CPU ^a."; 85 rc_messages (3, rcerr_addscu_no_mask) = "^a does not have mask assigned to CPU ^a."; 86 rc_messages (3, rcerr_addscu_bad_mask) = "^a has mask ^a assigned to non-CPU port."; 87 rc_messages (3, rcerr_addscu_fault) = "^a cannot be accessed by CPU ^a."; 88 rc_messages (3, rcerr_addscu_switches) = "Switches for ^a set improperly on CPU ^a."; 89 rc_messages (3, rcerr_addscu_enable) = "^a is not enabled on CPU ^a."; 90 rc_messages (3, rcerr_addscu_manual) = "^a is not in PROGRAM mode."; 91 rc_messages (3, rcerr_addscu_oldexpand) = "^a is a 6000 SCU which may not have a port expander."; 92 rc_messages (3, rcerr_addscu_bigconfig) = "^a has less memory than config card indicates."; 93 rc_messages (3, rcerr_addscu_memoverlap) = "^a has a possible memory address overlap problem."; 94 95 rc_messages (4, rcerr_delmain_nomem) = "Not enough main memory to remove ^a."; 96 rc_messages (4, rcerr_delmain_abs_wired) = "Abs wired pages in ^a."; 97 98 rc_messages (6, rcerr_delmain_nomem) = "Not enough main memory left."; 99 rc_messages (6, rcerr_delmain_abs_wired) = "Abs wired pages in memory."; 100 101 102 /* Now set up call to create data base */ 103 104 cdsa.sections (1).p = addr (rc_messages_array); 105 cdsa.sections (1).len = size (rc_messages_array); 106 cdsa.sections (1).struct_name = "rc_messages_array"; 107 108 cdsa.seg_name = "rc_messages"; 109 cdsa.num_exclude_names = 0; 110 cdsa.exclude_array_ptr = null (); 111 112 string (cdsa.switches) = "0"b; 113 cdsa.switches.have_text = "1"b; 114 115 call create_data_segment_ (addr (cdsa), code); 116 1 1 1 2 /* Begin include file ...... rcerr.incl.pl1 */ 1 3 /* These are the reconfiguration error codes. */ 1 4 /* Created 4/5/76 by Noel I. Morris */ 1 5 /* Modified 5/25/78 by J. A. Bush to add ISOLTS reconfig error codes */ 1 6 /* Modified 5/79 by BSG for port expander */ 1 7 1 8 1 9 /****^ HISTORY COMMENTS: 1 10* 1) change(88-07-27,Farley), approve(88-10-05,MCR7968), 1 11* audit(88-10-10,Beattie), install(88-10-14,MR12.2-1166): 1 12* Added new rcerr_addscu_memoverlap error code. 1 13* END HISTORY COMMENTS */ 1 14 1 15 1 16 dcl (rcerr_addcpu_no_response init (1), /* no response from CPU */ 1 17 rcerr_addcpu_bad_switches init (2), /* CPU config switches set improperly */ 1 18 rcerr_addcpu_trouble init (3), /* trouble fault adding CPU */ 1 19 rcerr_addcpu_startup init (4), /* startup fault adding CPU */ 1 20 rcerr_addcpu_lockup init (5), /* lockup fault adding CPU */ 1 21 rcerr_addcpu_gcos init (6), /* attempt to add processor in GCOS mode */ 1 22 rcerr_addcpu_amoff init (7), /* attempt to add processor with assoc mem off */ 1 23 rcerr_addcpu_enable init (8) /* controller port for CPU not enabled */ 1 24 ) fixed bin static options (constant); 1 25 1 26 dcl (rcerr_delcpu_no_stop init (1), /* CPU did not stop running */ 1 27 rcerr_delcpu_last init (2), /* attempt to delete last CPU */ 1 28 rcerr_delcpu_no_good_blcpu init (3) /* no suitable bootload CPU left */ 1 29 ) fixed bin static options (constant); 1 30 1 31 dcl (rcerr_addscu_size init (1), /* memory size discrepancy */ 1 32 rcerr_addscu_dup_mask init (2), /* duplicate mask assignment */ 1 33 rcerr_addscu_no_mask init (3), /* no mask assigned to CPU */ 1 34 rcerr_addscu_bad_mask init (4), /* mask assigned to non-CPU port */ 1 35 rcerr_addscu_fault init (5), /* fault trying to add controller */ 1 36 rcerr_addscu_switches init (6), /* some active module has incorrect switches */ 1 37 rcerr_addscu_enable init (7), /* some active module not enabled */ 1 38 rcerr_addscu_manual init (8), /* 4MW SCU is in manual mode */ 1 39 rcerr_addscu_oldexpand init (9), /* Adding 6000 SCU with port expander */ 1 40 rcerr_addscu_bigconfig init (10), /* SCU has less memory than config cards say */ 1 41 rcerr_addscu_memoverlap init (11) /* SCU has possible memory address overlap */ 1 42 ) fixed bin static options (constant); 1 43 1 44 dcl (rcerr_delmain_nomem init (1), /* not enough main memory left */ 1 45 rcerr_delmain_abs_wired init (2) /* abs wired pages in memory */ 1 46 ) fixed bin static options (constant); 1 47 1 48 dcl (rcerr_locked init (12), /* database already locked */ 1 49 rcerr_online init (13), /* device already online */ 1 50 rcerr_no_config init (14), /* device not in configuration */ 1 51 rcerr_not_online init (15), /* device not online */ 1 52 rcerr_range init (16), /* request is out of range */ 1 53 rcerr_sprq_failed init (17) /* could not set CPU required */ 1 54 1 55 ) fixed bin static options (constant); 1 56 1 57 dcl (rcerr_isolts_locked init (1), /* reconfig_lock locked to another process */ 1 58 rcerr_isolts_illegal_cpu init (2), /* illegal cpu tag */ 1 59 rcerr_isolts_cpu_online init (3), /* requested cpu is online */ 1 60 rcerr_isolts_no_config init (4), /* requested cpu is not configured */ 1 61 rcerr_isolts_two_scu init (5), /* Must have at least two SCUs to run ISOLTS */ 1 62 rcerr_isolts_illegal_scu init (6), /* illegal scu tag */ 1 63 rcerr_isolts_bootload_scu init (7), /* requested scu is the bootload memory */ 1 64 rcerr_isolts_scu_not init (8), /* requested scu is not configured */ 1 65 rcerr_isolts_not init (9), /* requesting process is not ISOLTS process */ 1 66 rcerr_isolts_wrong_cell init (10), /* interrupt answered in correct scu but wrong cell */ 1 67 rcerr_isolts_wrong_scu init (11), /* interrupt answered in wrong scu */ 1 68 rcerr_isolts_wrong_scu_cell init (12), /* interrupt answered in wrong scu on wrong cell */ 1 69 rcerr_isolts_no_response init (13), /* No response to a processor start interrupt */ 1 70 rcerr_isolts_bad_switches init (14), /* read switch data is not in expected format */ 1 71 rcerr_isolts_lda_fail init (15), /* A LDA 2 did not operate correctly */ 1 72 rcerr_isolts_no_str_flt init (16), /* No store falt when a LDA 64k was executed */ 1 73 rcerr_isolts_no_mask init (17) /* No mask set for test cpu */ 1 74 ) fixed bin static options (constant); 1 75 1 76 dcl 1 switch_w1 aligned based, /* template for switch word 1, when containing diagnostic info */ 1 77 (2 cell fixed bin (5), /* interrupt cell being used */ 1 78 2 errtag fixed bin (5), /* tag of scu in error */ 1 79 2 valid bit (1), /* if on then offset field is valid */ 1 80 2 pad bit (5), 1 81 2 offset bit (18)) unaligned; /* offset of error if any */ 1 82 1 83 /* End of include file ...... rcerr.incl.pl1 */ 1 84 117 118 2 1 /* BEGIN INCLUDE FILE cds_args.incl.pl1 */ 2 2 2 3 dcl 1 cds_args based aligned, 2 4 2 sections (2), 2 5 3 p ptr, /* pointer to data for text/static section */ 2 6 3 len fixed bin (18), /* size of text/static section */ 2 7 3 struct_name char (32), /* name of declared structure for this section */ 2 8 2 seg_name char (32), /* name to create segment by */ 2 9 2 num_exclude_names fixed bin, /* number of names in exclude array */ 2 10 2 exclude_array_ptr ptr, /* pointer to array of exclude names */ 2 11 2 switches, /* control switches */ 2 12 3 defs_in_link bit (1) unal, /* says put defs in linkage */ 2 13 3 separate_static bit (1) unal, /* says separate static section is wanted */ 2 14 3 have_text bit (1) unal, /* ON if text section given */ 2 15 3 have_static bit (1) unal, /* ON if static section given */ 2 16 3 pad bit (32) unal; 2 17 2 18 dcl exclude_names (1) char (32) based; /* pointed to be cds_args.exclude_array_ptr */ 2 19 2 20 /* END INCLUDE FILE cds_args.incl.pl1 */ 119 120 121 end rc_messages; SOURCE FILES USED IN THIS COMPILATION. LINE NUMBER DATE MODIFIED NAME PATHNAME 0 10/14/88 1308.5 !BBBJXkdmpPfLZP.pl1 >spec>install>MR12.2-1166>rc_messages.cds 117 1 10/14/88 1308.6 rcerr.incl.pl1 >spec>install>MR12.2-1166>rcerr.incl.pl1 119 2 04/01/76 2209.5 cds_args.incl.pl1 >ldd>include>cds_args.incl.pl1 NAMES DECLARED IN THIS COMPILATION. IDENTIFIER OFFSET LOC STORAGE CLASS DATA TYPE ATTRIBUTES AND REFERENCES (* indicates a set context) NAMES DECLARED BY DECLARE STATEMENT. addr builtin function dcl 53 ref 104 115 115 cds_args based structure level 1 dcl 2-3 cdsa 000100 automatic structure level 1 dcl 49 set ref 115 115 code 000145 automatic fixed bin(35,0) dcl 50 set ref 115* create_data_segment_ 000012 constant entry external dcl 57 ref 115 exclude_array_ptr 42 000100 automatic pointer level 2 dcl 49 set ref 110* have_text 44(02) 000100 automatic bit(1) level 3 packed packed unaligned dcl 49 set ref 113* len 2 000100 automatic fixed bin(18,0) array level 3 dcl 49 set ref 105* null builtin function dcl 53 ref 110 num_exclude_names 40 000100 automatic fixed bin(17,0) level 2 dcl 49 set ref 109* p 000100 automatic pointer array level 3 dcl 49 set ref 104* rc_messages 000146 automatic char(64) array level 2 dcl 51 set ref 63* 64* 65* 66* 67* 68* 70* 71* 72* 73* 74* 75* 76* 77* 79* 80* 81* 83* 84* 85* 86* 87* 88* 89* 90* 91* 92* 93* 95* 96* 98* 99* rc_messages_array 000146 automatic structure level 1 dcl 51 set ref 61* 104 105 rcerr_addcpu_amoff 000006 constant fixed bin(17,0) initial dcl 1-16 ref 76 rcerr_addcpu_bad_switches 000013 constant fixed bin(17,0) initial dcl 1-16 ref 71 rcerr_addcpu_enable 000763 constant fixed bin(17,0) initial dcl 1-16 ref 77 rcerr_addcpu_gcos 000007 constant fixed bin(17,0) initial dcl 1-16 ref 75 rcerr_addcpu_lockup 000010 constant fixed bin(17,0) initial dcl 1-16 ref 74 rcerr_addcpu_no_response 000761 constant fixed bin(17,0) initial dcl 1-16 ref 70 rcerr_addcpu_startup 000011 constant fixed bin(17,0) initial dcl 1-16 ref 73 rcerr_addcpu_trouble 000012 constant fixed bin(17,0) initial dcl 1-16 ref 72 rcerr_addscu_bad_mask 000011 constant fixed bin(17,0) initial dcl 1-31 ref 86 rcerr_addscu_bigconfig 000004 constant fixed bin(17,0) initial dcl 1-31 ref 92 rcerr_addscu_dup_mask 000013 constant fixed bin(17,0) initial dcl 1-31 ref 84 rcerr_addscu_enable 000006 constant fixed bin(17,0) initial dcl 1-31 ref 89 rcerr_addscu_fault 000010 constant fixed bin(17,0) initial dcl 1-31 ref 87 rcerr_addscu_manual 000763 constant fixed bin(17,0) initial dcl 1-31 ref 90 rcerr_addscu_memoverlap 000762 constant fixed bin(17,0) initial dcl 1-31 ref 93 rcerr_addscu_no_mask 000012 constant fixed bin(17,0) initial dcl 1-31 ref 85 rcerr_addscu_oldexpand 000005 constant fixed bin(17,0) initial dcl 1-31 ref 91 rcerr_addscu_size 000761 constant fixed bin(17,0) initial dcl 1-31 ref 83 rcerr_addscu_switches 000007 constant fixed bin(17,0) initial dcl 1-31 ref 88 rcerr_delcpu_last 000013 constant fixed bin(17,0) initial dcl 1-26 ref 80 rcerr_delcpu_no_good_blcpu 000012 constant fixed bin(17,0) initial dcl 1-26 ref 81 rcerr_delcpu_no_stop 000761 constant fixed bin(17,0) initial dcl 1-26 ref 79 rcerr_delmain_abs_wired 000013 constant fixed bin(17,0) initial dcl 1-44 ref 96 99 rcerr_delmain_nomem 000761 constant fixed bin(17,0) initial dcl 1-44 ref 95 98 rcerr_locked 000760 constant fixed bin(17,0) initial dcl 1-48 ref 63 rcerr_no_config 000002 constant fixed bin(17,0) initial dcl 1-48 ref 65 rcerr_not_online 000001 constant fixed bin(17,0) initial dcl 1-48 ref 66 rcerr_online 000003 constant fixed bin(17,0) initial dcl 1-48 ref 64 rcerr_range 000757 constant fixed bin(17,0) initial dcl 1-48 ref 67 rcerr_sprq_failed 000000 constant fixed bin(17,0) initial dcl 1-48 ref 68 sections 000100 automatic structure array level 2 dcl 49 seg_name 30 000100 automatic char(32) level 2 dcl 49 set ref 108* size builtin function dcl 53 ref 105 string builtin function dcl 53 set ref 61* 112* struct_name 3 000100 automatic char(32) array level 3 dcl 49 set ref 106* switches 44 000100 automatic structure level 2 dcl 49 set ref 112* NAMES DECLARED BY DECLARE STATEMENT AND NEVER REFERENCED. exclude_names based char(32) array packed unaligned dcl 2-18 rcerr_isolts_bad_switches constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_bootload_scu constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_cpu_online constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_illegal_cpu constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_illegal_scu constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_lda_fail constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_locked constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_no_config constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_no_mask constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_no_response constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_no_str_flt constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_not constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_scu_not constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_two_scu constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_wrong_cell constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_wrong_scu constant fixed bin(17,0) initial dcl 1-57 rcerr_isolts_wrong_scu_cell constant fixed bin(17,0) initial dcl 1-57 switch_w1 based structure level 1 dcl 1-76 NAME DECLARED BY EXPLICIT CONTEXT. rc_messages 000453 constant entry external dcl 23 THERE WERE NO NAMES DECLARED BY CONTEXT OR IMPLICATION. STORAGE REQUIREMENTS FOR THIS PROGRAM. Object Text Link Symbol Defs Static Start 0 0 1030 1044 764 1040 Length 2656 764 14 1575 44 0 BLOCK NAME STACK SIZE TYPE WHY NONQUICK/WHO SHARES STACK FRAME rc_messages 1518 external procedure is an external procedure. STORAGE FOR AUTOMATIC VARIABLES. STACK FRAME LOC IDENTIFIER BLOCK NAME rc_messages 000100 cdsa rc_messages 000145 code rc_messages 000146 rc_messages_array rc_messages THE FOLLOWING EXTERNAL OPERATORS ARE USED BY THIS PROGRAM. call_ext_out return_mac ext_entry THE FOLLOWING EXTERNAL ENTRIES ARE CALLED BY THIS PROGRAM. create_data_segment_ NO EXTERNAL VARIABLES ARE USED BY THIS PROGRAM. LINE LOC LINE LOC LINE LOC LINE LOC LINE LOC LINE LOC LINE LOC 23 000452 61 000460 63 000464 64 000471 65 000476 66 000503 67 000510 68 000515 70 000522 71 000527 72 000534 73 000541 74 000546 75 000553 76 000560 77 000565 79 000572 80 000577 81 000604 83 000611 84 000616 85 000623 86 000630 87 000635 88 000642 89 000647 90 000654 91 000661 92 000666 93 000673 95 000700 96 000705 98 000712 99 000717 104 000724 105 000726 106 000730 108 000733 109 000736 110 000737 112 000741 113 000742 115 000744 121 000756 Object Segment >spec>install>MR12.2-1166>rc_messages Created on 10/14/88 1313.8 mst Fri by Hirneisen.SysMaint.a using create_data_segment_, Version II of Thursday, November 20, 1986 Object Text Defs Link Symb Static Start 0 0 2600 2626 2636 2636 Length 3143 2600 26 10 271 0 3 Definitions: segname: rc_messages text|0 rc_messages symb|0 symbol_table No Links. ----------------------------------------------------------- Historical Background This edition of the Multics software materials and documentation is provided and donated to Massachusetts Institute of Technology by Group BULL including BULL HN Information Systems Inc. as a contribution to computer science knowledge. This donation is made also to give evidence of the common contributions of Massachusetts Institute of Technology, Bell Laboratories, General Electric, Honeywell Information Systems Inc., Honeywell BULL Inc., Groupe BULL and BULL HN Information Systems Inc. to the development of this operating system. Multics development was initiated by Massachusetts Institute of Technology Project MAC (1963-1970), renamed the MIT Laboratory for Computer Science and Artificial Intelligence in the mid 1970s, under the leadership of Professor Fernando Jose Corbato. Users consider that Multics provided the best software architecture for managing computer hardware properly and for executing programs. Many subsequent operating systems incorporated Multics principles. Multics was distributed in 1975 to 2000 by Group Bull in Europe , and in the U.S. by Bull HN Information Systems Inc., as successor in interest by change in name only to Honeywell Bull Inc. and Honeywell Information Systems Inc. . ----------------------------------------------------------- Permission to use, copy, modify, and distribute these programs and their documentation for any purpose and without fee is hereby granted,provided that the below copyright notice and historical background appear in all copies and that both the copyright notice and historical background and this permission notice appear in supporting documentation, and that the names of MIT, HIS, BULL or BULL HN not be used in advertising or publicity pertaining to distribution of the programs without specific prior written permission. Copyright 1972 by Massachusetts Institute of Technology and Honeywell Information Systems Inc. Copyright 2006 by BULL HN Information Systems Inc. Copyright 2006 by Bull SAS All Rights Reserved