About Course

Course Summary Learning Objectives Who Should Attend Course
Schedule Program Outline About the Lecturers Apply

Multicore Programming [6.05s]

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Date: TBD, 2010 | Tuition: $3,250 (tentative) | Continuing Education Units (CEUs): 3.3 (tentative)

This class is tentatively planned for 2010, depending on the level of interest. Email the Short Programs office to express your interest in taking this course. Please include your industry and learning goals.

Why Multiprocessor Programming?

The computer industry is undergoing a paradigm shift. Chip manufacturers are shifting development resources away from single-processor chips to a new generation of multi-processor chips known as multicores.

This fundamental change in our core computing architecture will require a fundamental change in how we program. The art of multiprocessor programming, currently mastered by few, is more complex than programming uniprocessor machines, and requires an understanding of new computational principles, algorithms, and programming tools.

Current computation on uniprocessor and multiprocessor architectures have many aspects in common. The key issue that distinguishes multiprocessor programming from concurrent uniprocessor programming is the need to understand how concurrent computations on separate processors coordinate with one another, a broad and intricate problem area we call multiprocessor synchronization.

There are no textbooks and few reference books addressing how to program multiprocessors, and none cover the fundamental issues of synchronization and how it affects data structure design. Most engineers must learn the tricks of the trade by asking for help from more experienced friends and through a laborious trial and error process. This course aims to change this state of affairs, providing a comprehensive presentation of the principles and tools available for programming multicore machines.

Learning Objectives

The participants of this course will be able to:

1. Grasp basic concepts in multicore machine programming.
2. Understand the interaction between hardware and software in multicore machines.
3. Write concurrent programs and understand how to reason about them.
4. Understand the synchronization and coordination mechanisms available on today's multicore machines.
5. Understand how multicore architectures affect concurrent program performance.
6. Learn how to design high performance concurrent data structures.
7. Learn how to use the Java Concurrency Package and similar synchronization libraries.

Who Should Attend

This course should appeal to anyone who programs large machines and those who oversee programmers or run websites and servers. The intended audience includes high-tech industries such as game development and network devices as well as the financial services industry.  Attendees should have some experience in the field.

Course Schedule, Registration Times, Special Events

Class runs 9:00 am - 5:00 pm every day.

Registration is on Monday morning from 8:00 - 8:30 am.

Special events include a dinner for course participants and faculty on Thursday night. Evening activities are included in tuition.

Daily Schedule:

9:00am - 10:30am - lecture
10:30am - 10:50 - break
10:50am - 12:20pm - lecture
12:20pm - 1:20pm - lunch
1:20pm - 3:20pm - classwork
3:20pm - 3:30pm - break
3:30pm - 5:00pm - lecture

Program Outline

The course will approach multiprocessor programming from two complementary directions. In the first part of the course, we focus on foundations: what our programs and machines need to provide in order to ensure that concurrent programs do what we expect. We use an idealized model of computation in which multiple concurrent threads manipulate a set of shared objects. This model is essentially the model presented by standard Java(TM) or C++ threads packages.

The foundations section is intended to build up the students' intuition and confidence in understanding and reasoning about concurrency. We approach this goal using examples, counter-examples, models, and exercises. These elements are laid out in a structured and progressive manner, from simple machine instructions to powerful universal constructions, the equivalent of Turing machines for multiprocessors.

The second part of the course will be concerned with performance. Reasoning about the performance of concurrent programs and data structures is very different in flavor from reasoning about their sequential counterparts. Sequential programming is based on a well-established and well-understood set of abstractions. There is little or no need to understand the specifics of the underlying architecture. In multiprocessor programming, by contrast, there are no such well-established abstractions. It is impossible to reason effectively about the performance of a concurrent data structure without understanding the fundamentals of the underlying architecture.

The performance part of the course will revisit many of the issues first raised in the foundations section, but in a more realistic model that exposes those aspects of the underlying architecture that most influence performance. The course then goes through a sequence of fundamental data structures, the concurrent analogs of the data structures found in any undergraduate data structures course, and a few foundation structures that are unique to the world of multithreaded computation. These data structures are introduced in an incremental way, each one extending the techniques developed for its predecessors. Each of these data structures is useful in and of itself as a reference. Moreover, by the end, the students will have built up a solid understanding of the fundamentals of concurrent data structure design, and should be well-prepared to design and implement his or her own concurrent data structures.

The hope is that at the end of the course students will have a basic understanding of both the foundations and the practice of the multiprocessor and multicore programming.

The course is based on the book, The Art of Multiprocessor Programming, by Herlihy and Shavit, Morgan-Kaufmann Elsevier 2008.

About The Lecturers

Maurice Herlihy
Maurice Herlihy is a Professor of Computer Science at Brown University. His research and teaching focus on multiprocessor synchronization, an area in which he holds numerous patents for both hardware and software synchronization algorithms, among them the original patent for Transactional Memory.

Professor Herlihy is an ACM Fellow, the recipient of the 2003 Dijkstra Prize in Distributed Computing, and a co-recipient of the 2004 ACM/EATCS Gödel Prize in Theoretical Computer Science.

Charles E. Leiserson
Charles Leiserson is a Professor of Computing Science and Engineering in the MIT Department of Electrical Engineering and Computer Science. He leads the Supercomputing Technologies (SuperTech) research group at MIT CSAIL.

Prof. Leiserson pioneered the development of VLSI theory. He and his SuperTech research group designed and developed the "Cilk" multithreaded programming language.

Prof. Leiserson is a past winner of the ACM Doctoral Dissertation Award as well as the Fannie and John Hertz Foundation Doctoral Thesis Prize, a Presidential Young Investigator Award. He is an ACM Fellow and a MacVicar fellow. His textbook Introduction to Algorithms, co-authored with Ronald L. Rivest and Thomas H. Cormen, is one of the most cited books in the computer science literature, was named Best 1990 Professional and Scholarly Book in Computer Science and Data Processing by the Association of American Publishers. For more information about Prof. Leiserson, please visit his web site.

Nir Shavit
Nir Shavit is a professor in the Department of Computer Science at Tel Aviv University, Israel. His research interests include practical and theoretical techniques for designing, implementing, and reasoning about multiprocessor machines.

He designed (together with his students) the first Software Transactional Memory system, and through his work with Sun Microsystems has been involved in the design of several of today's state of the art STMs. He has over twenty years of experience in teaching multiprocessor algorithms, and holds numerous patents for both hardware and software synchronization algorithms.

Nir Shavit is a co-recipient of the 2004 ACM/EATCS Gödel Prize in Theoretical Computer Science.

* A limited number of partial-tuition scholarships are available. You may submit a scholarship request by filling out the Scholarship Request Form no more than two weeks after your application to the course has been submitted. Please note that these scholarships are only for partial tuition and do not cover travel, lodging, or other expenses associated with the course. Incomplete requests and requests that are not preceded by a course application will not be reviewed.

If you have any questions please contact the Short Programs office.