SMA - Annual Report 20045/2005



Project abstracts can be viewed from the CD-ROM which is enclosed or the SMA website (http://www.sma.nus.edu.sg).

AMM&NS Programme	HPCES Programme	IMST Programme	MEBCS Programme
CS Programme

CS Programme

DR LIM HOCK BENG Expertise: High performance and grid computing, parallel and distributed computing, computer architecture, performance evaluation, database systems, storage systems, wireless and broadband networks, web services infrastructure and internet security

Sensor Grid: Issues and Performance

Project Advisor (Singapore)	:	Assoc Prof Wong Weng Fai Assoc Prof Teo Yong Meng

Duration	:	January 2005 to March 2006

Project Abstract:

Newer grid applications are more data-centric and more focused on distributed services than traditional grid applications. Increasingly, data for these newer grid applications are being collected by a new class of small, self-contained, and intelligent devices called sensors. Sensor networks allow the physical environment to be measured at higher resolution in applications such as emergency medical services, tracking of goods and people, and monitoring of various environment.

This project aims to investigate the performance issues of integrating sensor data into the grid architecture. The project is divided into two main parts: (i) design and implementation of a sensor grid test-bed and associated system software, (ii) development of a sensor grid simulator for studying issues such as data distribution and management, scalability, robustness, quality of service, etc.

Memory Hierarchy Hardware-Software Co-Design in Embedded Systems

Project Advisor (Singapore)	:	Assoc Prof Wong Weng Fai

Duration	:	September 2004 to July 2006

Project Abstract:

The memory hierarchy is the main performance bottleneck in modern computer systems as the gap between the speed of the processor and the memory continues to grow larger. This problem becomes even worse in embedded systems, since the memory hierarchy consumes a large amount of resources such as chip area and energy. Thus, it is very important to optimize the memory hierarchy to reduce hardware usage and energy consumption while sustaining high performance.

In this project, we propose a new framework for designing the memory hierarchy for embedded systems. This framework explores the entire design space of architectural and application optimization uniformly. It takes the application source code, hardware architecture information, and design objective constraints as inputs. The output consists of optimized application code and the corresponding memory hierarchy specification based on reconfigurable logic.

- Go back to titles