Strained semiconductor layer, MOS transistor, Wafer Bonding
Semiconductor-based substrates and electronic devices
This invention proposes a structure that consists of two layers formed of the same semiconducting material (e.g. Si or Ge), but having different levels of strain. The two layers can be bonded directly one to the other to maintain a strain in at least one of the layers. Parallel to the interface, the lattice spacing of the second layer is different than the lattice spacing of the first layer. High-performance transistors can be designed based on such a semiconductor-based structure.
Elimination of undesirable strain-inducing layers found in prior substrates
U.S. Patent Number 7,495,266, issued on February 24, 2009
Last revised: January 19, 2012
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