Dislocation density, multicrystalline silicon wafers, dislocation density etching, dislocation density imaging, solar cells, solar cell wafers, bulk defects, edge dislocation, efficiency enhancement, crystal defects
Polycrystalline silicon ingots, wafers and cells
Increasing energy conversion efficiency for pc-Si solar cells
This invention describes a method to significantly reduce dislocation density in pc-Si bricks or wafers, consisting of the following three steps: 1) a high temperature anneal to eliminate dislocations, 2) a diffusion barrier to slow the entry of impurities, 3) a controlled cool to room temperature. Although dislocation density minimization is commonly attempted during ingot crystallization by a high-temperature “holding step” before cool-down, there are significant advantages to performing this at the brick or wafer level: greater surface area to volume ratio facilitates better dislocation out-diffusion and more linear time-temperature profiles, hence avoiding thermal stresses that generate new dislocations. The inventors have successfully demonstrated substantial reductions in pc-Si dislocations.
U.S. Patent filed January 23, 2009
Katy Hartman, Mariana Bertoni, James Serdy, and Tonio Buonassisi. Dislocation density reduction in multicrystalline silicon solar cell material by high temperature annealing Applied Physics Letters 93, 122108 (2008). DOI: 10.1063/1.2909644
Last revised: November 8, 2010
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