Case 14010

Deposition Processes and Equipments of Forming Ge on Si


Deposition of Ge on Si, Ge pin diodes, Germanium


Ge pin diodes, microphotonics


The Ge films deposited using the current technology contain a number of defects such as dislocations, leading to poor-performance Ge devices.


This invention presents a low-temperature deposition process of Ge on Si with high quality. The starting Si surface is first terminated with hydrogen by HF treatment, as in the previous method. Then the deposition follows three steps: 1. Removal of hydrogen atoms from the Si surface before the Ge deposition; 2. Use of Chemical vapor deposition (CVP) and deposition of Ge on the reactive Si surface without hydrogen. 3. Use of high-purity Ge source gas without dilution or high-purity Ge source gas diluted in an inert gas such as N2, Ar and He, being free from contaminants.

  • Thicker films can be deposited at low temperatures, enhances deposition rate therefore effectively reduces the deposition time (gas consumption) for the required film thickness.
  • The dark current at the reverse bias of I V is reduced from -200 A/cm2 to -50 A/cm2, meaning that the defects causing the carrier generation are decreased, hence the growth of high-quality Ge.
  • Inventors:
    • Professor Lionel C. Kimerling(Department of Material Sciences and Engineering, MIT)
    • Kazumi Wada (University of Tokyo)
    • Yasuhiko Ishiwaka (University of Tokyo)
    • Jiro Osaka (University of Tokyo)

    Intellectual Property:

    WO Patent Application PCT/US2010/49766 filed on 9/22/2010



    Last revised: Aug 24, 2011

    »List of MIT Energy IP«