Case 15220

A Method for Producing Thin Layers of Crystalline Silicon without Wire-Sawing


Thin crystalline Si (ts-Si) layers, wire-sawing, silicon PV


The invention can be used in photovoltaic devices such as; single or dual homojunction device, tunable voltage device, and wafer splitting, among others.


Wire-sawn wafers are limited in thickness because of breakage and mechanical stability. Additionally, during the slicing process, a large fraction of material is lost as waste.


This invention describes a method to create thin, crystalline Si (tc-Si) layers, many of which can be grown and separated from the same crystalline silicon (c-Si) template.

  • Rapid production of tc-Si layers that do not require sawing wafers individually from a c-Si boule.
  • Enables thinner layer thicknesses than wire-sawing methods
  • Cheap, quick, and lower energy consumption
  • Significantly reduces kerf loss and silicon cost in modules
  • Easy to form production line around the process, and template is re-used
  • Enables more diverse array of silicon feedstock as well as more control over doping
  • Easily fits into existing cell and module supply chain

  • Professor Tonio Buonassisi(Department of Mechanical Engineering, MIT)
  • Mark T. Winkler (Department of Mechanical Engineering, MIT)
  • Riley Brandt(Department of Mechanical Engineering, MIT)

Intellectual Property:

US Patent Application Number 13/660213, filed on October 25, 2011

PCT Patent Application Number PCT/US2012/062064, filed on October 26, 2012



Last revised: April 30, 2013

»List of MIT Energy IP«