Designer-driven Stochastic Multi-objective Optimization for Circuit Sizing and Hierarchical synthesis

A New Methodology for analog circuit optimization

We have designed a new methodology for automatic sizing of analog/RF circuits by incorporating the designer's knowledge/intuition into simulation-based stochastic circuit optimization. Our technique uses SPICE in loop for optimization, however is not 'blind' or 'random' in search like earlier approaches by Rutenbar, and Gielen, We have a methodology to capture designer's intuition in a simple table with choices (also derivable from simple first order equations) and use this information to guide the adaptive search leading to fast and accurate optimization.


What we are not

Limitation of other approaches transcended in current methodology

Geometric Programming

Simulation Based Approach

Technique Description

Other information

Other/Forthcoming Reports

For more information, contact

Varun Aggarwal, varun_ag [at] mit DOT edu