Design Rules

Design Rules define all the parameters that the board layout has to follow.

The Design Rule Check checks the board against these rules and reports any violations.

The Design Rules of a board can be modified through the Design Rules dialog, which appears if the DRC command is selected without a terminating ';'.

Newly created boards take their design rules from the file 'default.dru', which is searched for in the first directory listed in the "Options/Directories/Design rules" path. If no such file is present, the program's builtin default values apply.

Note regarding the values for Clearance and Distance: since the internal resolution of the coordinates is 1/10000mm, the DRC can only reliably report errors that are larger than 1/10000mm.


The File tab shows a description of the current set of Design Rules and allows you to change that description (this is strongly recommended if you define your own Design Rules). There are also buttons to load a different set of Design Rules from a disk file and to save the current Design Rules to disk.
Note that the Design Rules are stored within the board file, so they will be in effect if the board file is sent to a board house for production. The "Load..." and "Save as..." buttons are merely for copying a board's Design Rules to and from disk.


The Layers tab defines which signal layers the board actually uses, how thick the copper and isolation layers are, and what kinds of vias can be placed (note that this applies only to actual vias; so even if no via from layer 1 to 16 has been defined in the layer setup, pads will always be allowed).

The layer setup is defined by the string in the "Setup" field. This string consists of a sequence of layer numbers, separated by one of the characters '*' or '+', where '*' stands for core material (also known as FR4 or something similar) and '+' stands for prepreg (or any other kind of isolation material). The actual core and prepreg sequence has no meaning to EAGLE other than varying the color in the layer display at the top left corner of this tab (the actual multilayer setup always needs to be worked out with the board manufacturer). The vias are defined by enclosing a sequence of layers with (...). So the setup string

would mean a two layer board, using layers 1 and 16 and vias going through the entire board (this is also the default value).
When building a multilayer board the setup could be something like
which is a four layer board with layer pairs 1/2 and 15/16 built on core material and vias drilled through them, and finally the two layer pairs pressed together with prepreg between them, and vias drilled all the way through the entire board.
Besides vias that go trough an entire layer stack (which are commonly referred to as buried vias in case they have no connection to the Top and Bottom layer) there can also be vias that are not drilled all the way through a layer stack, but rather end at a layer inside that stack. Such vias are known as blind vias and are defined in the "Setup" string by enclosing a sequence of layers with [t:...:b], where t and b are the layers up to which that via will go from the top or bottom side, respectively. A possible setup with blind vias could be
which is basically the previous example, with two additional outer layers that are connected to the next inner layers by blind vias. It is also possible to have only one of the t or b parameters, so for instance
would also be a valid setup. Finally, blind vias are not limited to starting at the Top or Bottom layer, but may also be used in inner layer stacks, as in
A blind via from layer a to layer b also implements all possible blind vias from layer a to all layers between layers a and b, so
would allow blind vias from layer 1 to 2 as well as from 1 to 3.


The Clearance tab defines the various minimum clearance values between objects in signal layers. These are usually absolute minimum values that are defined by the production process used and should be obtained from your board manufacturer.
The actual minimum clearance between objects that belong to different signals will also be influenced by the net classes the two signals belong to.

Note that a polygon in the special signal named _OUTLINES_ will be used to generate outlines data and as such will not adhere to these clearance values.


The Distance tab defines the minimum distance between objects in signal layers and the board dimensions, as well as that between any two drill holes. Note that only signals that are actually connected to at least one pad or smd are checked against the board dimensions. This allows edge markers to be drawn in the signal layer without generating DRC errors.

For compatibility with version 3.5x the following applies: If the minimum distance between copper and dimension is set to 0 objects in the Dimension layer will not be taken into account when calculating polygons (except for Holes, which are always taken into account). This also disables the distance check between copper and dimension objects.


The Sizes tab defines the minimum width of any objects in signal layers and the minimum drill diameter. These are usually absolute minimum values that are defined by the production process used and should be obtained from your board manufacturer.
The actual minimum width of signal wires and drill diameter of vias will also be influenced by the Net Class the signal belongs to.


The Restring tab defines the width of the copper ring that has to remain after the pad or via has been drilled. Values are defined in percent of the drill diameter and there can be an absolute minimum and maximum limit. Restrings for pads can be different for the top, bottom and inner layers, while for vias they can be different for the outer and inner layers.
If the actual diameter of a pad (as defined in the library) or a via would result in a larger restring, that value will be used in the outer layers. Pads in library packages can have their diameter set to 0, so that the restring will be derived entirely from the drill diameter.


The Shapes tab defines the actual shapes for smds and pads.
Smds are normally defined as rectangles in the library (with a "roundness" of 0), but if your design requires rounded smds you can specify the roundness factor here.
Pads are normally defined as octagons in the library (long octagons where this makes sense), and you can use the combo boxes to specify whether you want to have pads with the same shapes as defined in the library, or always square, round or octagonal. This can be set independently for the top and bottom layer.
If the "first" pad of a package has been marked as such in the library it will get the shape as defined in the third combo box (either round, square or octagonal, or no special shape).
The Elongation parameters define the appearance of pads with shape Long or Offset.


The Supply tab defines the dimensions of Thermal and Annulus symbols used in supply layers.
Please note that the actual shape of supply symbols may be different when generating output for photoplotters that use specific thermal/annulus apertures! See also the notes about "Supply Layers" in the LAYER command.


The Masks tab defines the dimensions of solder stop and cream masks. They are given in percent of the smaller dimension of smds, pads and vias and can have an absolute minimum and maximum value.
Solder stop masks are generated for smds, pads and those vias that have a drill diameter that exceeds the given Limit parameter.
Cream masks are generated for smds only.


The Misc tab allows you to turn on a grid and angle check.

Index Copyright © 2005 CadSoft Computer GmbH