A schematic and board file are logically interconnected through automatic
Forward&Back Annotation. Normally there are no special things to be
considered about Forward&Back Annotation. This section, however, lists all of the
details about what exactly happens during f/b activities:
When adding a new part to a schematic, the part's package is added
to the board at the lower left corner of the drawing.
If the part contains power pins (pins with Direction "Pwr") the related
pads will be automatically connected to their power signals.
When deleting a part from a schematic drawing, the part's package is
deleted from the board. Any wires that were connected to that package
are left unchanged. This may require additional vias to be set in
order to keep signals connected. These vias will not be set automatically!
The ratsnest will be re-calculated for those signals that were connected
to the removed package.
When deleting a part from a board drawing, all of the gates contained
in that part will be deleted from the schematic. Note that this may
affect more than one sheet, if the gates were placed on different
sheets!
After an operation that removes a pad from a signal that has a supply
layer, the Thermal/Annulus display may be incorrect. In such a case
a window refresh will show the correct Thermal/Annulus symbols.
The same applies to Undo/Redo operations that involve pads connected
to supply layers.
A PinSwap or GateSwap operation in the schematic will make all the
necessary changes to the wires of the board. However, after this
operation the wires may overlap or violate minimum distance rules.
Therefore the user should take a look at these wires and modify them
with Move, Split, Change Layer etc.
To make absolutely sure that a board and schematic belong to each
other (and are therefore connected via Forward&Back Annotation)
the two files must have the same file name (with extensions .brd and .sch)
and must be located in the same directory!
The Replace command checks whether all pads in the old package which
have been assigned to pins will also be present in the new package,
regardless whether they are connected to a signal or not.
When the pins of two parts in the schematic are directly overlapping
(and thus connected without a visible net wire), a net wire will be
generated when these parts are moved away from each other.
This is done to avoid unnecessary ripup of signal wires in the board.