| Week of |
Tue |
Thu |
| Sep 07 |
Registration Day |
L01: Course overview. Digital abstraction, static discipline, logic families
|
| Sep 14 |
L02: Combinational logic, canonical representations, simplification and synthesis
|
L03: Verilog hardware description languge. FPGA architectures
|
| Sep 21 |
L04: Sequential building blocks, state and feedback, registers
|
L05: Finite state machines, Verilog implementation examples
|
| Sep 28 |
L06: Case study: video circuits
|
L07: System Integration, Clocking, number encoding
|
| Oct 05 |
L08: Arithmetic circuits, adder, multipliers
|
L09: Behavioral transformations, FPGA
|
| Oct 12 |
Monday Class Schedule |
L10: Analog building blocks (opamps, DACs, ADCs), sampling, reconstruction, filtering
|
| Oct 19 |
L11: Project kickoff and writing workshop: proposals and presentations (attendance required)
|
L12: Memories: on-chip, SRAM, DRAM, Flash
|
| Oct 26 |
L13: Potpourri: FFT, FPGAs, RFID, Tools
|
Writing workshop: final report |
|
L14: VLSI and power
|
| Nov 02 |
Project Proposal Draft due
Schedule optional presentation rehearsal with staff
|
Project Block Diagram Meeting by 11/06 by 5pm
|
| Nov 09 |
Project Design Presentations
(2:30-5PM room 1-190) - attendance required
|
Project Design Presentations
(2:30-5PM room 1-190) - attendance required
|
| Nov 16 |
|
Project Checklist Meeting with Staff |
|
Revised Project Proposals due 11/14 (Fri) by 5pm |
|
Final project integration
Project Checklist Meeting with Staff by 11/20 (Fri) by 5pm
|
| Nov 23 |
Final project integration and debugging
One week remaining! |
Thanksgiving |
| Nov 30 |
Final project debugged - finishing touches!
The last week!
|
| Dec 07 |
Project Checkoffs 12/07, 4-11 pm (Mon)
|
Project demos and recording; return tool kits 12/08 @ 5-11 pm (Tue) |
|
Project Report due 12/09@ 5PM (Wed)
|