By J. H. Saltzer, April 22, 1994

Chipmaking and complexity
April 22, 1994

In yesterday's recitation I found an interesting integrating
example--integrating 6.004, complexity, and coordination.  The
previous day, IBM announced the PowerPC 604 chip, and the two-page
display ad from the Wall Street Journal provided a starting point for
discussion.

Some of the hype surrounding the chip (actually, I may have the details
mixed up with the prospective PPC 620, but the point is the same)
included "six million transistors" and "multiple instruction issue".  So
I asked, "This must be awfully complex--how could they possibly get it to
work?"  To reinforce the point, I asked people how many transistors were
in their 6.004 Maybe machine, for which the conclusion was something
between 10,000 and 100,000.  And I asked whether or not there were any
bugs in their Maybe implementation.  You can guess the answer.

Both classes quickly came up with three methods by which the PPC604
might be keeping the complexity under control:

1.  There must be a lot of regularity and repetition, rather than
six million transistors worth of random logic.

2.  The designers must have simulated the chip till they turned blue.

3.  The PC604 is a modest change from the PC601, so all they really
had to do was avoid the second-system effect; they could concentrate
on, e.g., just performance aspects.

So I asked where the regularity might come from.  Three ideas were
suggested:  there is probably an on-board cache, which can soak up a
lot of transistor count with a very modest design cost.  There are
registers, which are probably repeated 32 or 64 times.  And the
multiple-instruction-issue feature allows them to design one
instruction decoder/issuer/ALU jungle and replicate it N times.

That led to a discussion of how much coordination machinery must be
added to make multiple instruction issue work.  This provided a
marvelous opportunity to drag in some chapter 7 stuff on coordination.

[Remainder elided--A revised version can be found under the topic
"coordinating multiple instruction issue]


                                        Jerry



Comments and suggestions:  Saltzer@mit.edu