LPset 7 Grading
- Correct implementation of CRC (3 points)
- Clean simulation screenshots showing r[15:0] and other signals as required (1 point)
- Readable Verilog with proper use of blocking and non-blocking assignments,
comments where needed, consistent indenting and use of parameters to symbols
and constants. (1 point)
Week of September 24, 2012
- This week's to-do list:
- Upload your lab 2 (1a) (2) Verilog.
We'll be looking for proper use of comments and formatting to make your code easy to understand. Verilog
for labs 3,4,5 will be graded. Resubmission of Verilog for regrading allowed only for lab 3.
- Tue: lecture, LPSet #5 due
- Thu: lecture, no LPset
- Fri: LPset #6 due upload by 16:59 (lab closes at 17:00)
- Lab 3 has been issued.
Suggested schedule:
- Part I (Implementation steps 1-4) week 1 (checkoff not required),
- Part II (the rest of the lab) 10/3
- alpha blend.bit sample bit file for FPGA
Week of September 16, 2013
- This week's to-do list:
- Tue: lecture, LPSet #3 due
- Thu: lecture, LPSet #4 due
- Thu: Lab 2 checkoff (you can check off as each section is completed)
- We will be giving demos in the 6.111 lab (38-600) on how
to use the labkit and information on lab2.
- Monday, 9/16, at 6:00pm and 8:00pm
Week of September 9, 2013
- This week's to-do list:
- Tue: lecture, LPSet #1 due
- Thu: lecture, LPSet #2 due
- Thu: Lab 1 checkoff completed.
Check off with any staff or LA in the lab MTWR. Staffed hours are posted on the
website.
- We will be giving demos in the 6.111 lab (38-600) on how to use
the logic analyzer and labkit -- info you'll want to know for completing
the labs! Here's the demo schedule (each demo is offered multiple times):
- Oscilloscope and Logic Analyzer Intro:
- Labkit Intro:
- Sunday, 9/15, at 3:00 pm, 6:00pm and 8:00pm
- Monday, 9/16, at 6:00pm and 8:00pm
- Send all questions to gim and drosner AT mit.edu
Week of September 2, 2013
- This week's to-do list:
- Thu: lecture
- Fill out information form in Thu lecture
- Read the Safety Memo
and sign the form digitally using your Kerboros username.
- Get started on Lab #1 (see below)
- The first meeting of 6.111 will be at lecture on Thursday,
9/6 at 2:30p in 32-144.
Consult the Course calendar
for schedule of lectures and labs.
- Please take a moment to read the
Course info page which describes course
mechanics, labs, final project, key dates, grading and policies.
- We will be giving demos in the 6.111 lab (38-600) on how to use
the logic analyzer and FPGA labkit -- info you'll want to know for completing
the labs!
Bring the Tool Kit Signout form
to the 6.111 lab (38-600) to check out a kit of parts, tools and test
equipment leads you'll need to work on the labs. Tool kits and lockers will be
assigned after the demos.
Here's the demo schedule (each demo is offered multiple times):
- Oscilloscope and Logic Analyzer Intro:
- Sunday, 9/8, at 6:00-7:00pm and 8:00-9:00pm
- Monday, 9/9, at 8:00-9:00pm
- FPGA Labkit Intro:
- Sunday, 9/15, at 6:00pm and 8:00pm
- Monday, 9/16, at 8:00pm