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The Motorola 680x0 version of as has a few machine
dependent options.
You can use the `-l' option to shorten the size of references to undefined
symbols. If you do not use the `-l' option, references to undefined
symbols are wide enough for a full long (32 bits). (Since
as cannot know where these symbols end up, as can
only allocate space for the linker to fill in later. Since as
does not know how far away these symbols are, it allocates as much space as it
can.) If you use this option, the references are only one word wide (16 bits).
This may be useful if you want the object file to be as small as possible, and
you know that the relevant symbols are always less than 17 bits away.
For some configurations, especially those where the compiler normally does not prepend an underscore to the names of user variables, the assembler requires a `%' before any use of a register name. This is intended to let the assembler distinguish between C variables and functions named `a0' through `a7', and so on. The `%' is always accepted, but is not required for certain configurations, notably `sun3'. The `--register-prefix-optional' option may be used to permit omitting the `%' even for configurations for which it is normally required. If this is done, it will generally be impossible to refer to C variables and functions with the same names as register names.
as can assemble code for several different members of the
Motorola 680x0 family. The default depends upon how as
was configured when it was built; normally, the default is to assemble
code for the 68020 microprocessor. The following options may be used to
change the default. These options control which instructions and
addressing modes are permitted. The members of the 680x0 family are
very similar. For detailed information about the differences, see the
Motorola manuals.
This syntax for the Motorola 680x0 was developed at MIT.
The 680x0 version of as uses instructions names and
syntax compatible with the Sun assembler. Intervening periods are
ignored; for example, `movl' is equivalent to `mov.l'.
In the following table apc stands for any of the address registers (`%a0' through `%a7'), the program counter (`%pc'), the zero-address relative to the program counter (`%zpc'), a suppressed address register (`%za0' through `%za7'), or it may be omitted entirely. The use of size means one of `w' or `l', and it may be omitted, along with the leading colon, unless a scale is also specified. The use of scale means one of `1', `2', `4', or `8', and it may always be omitted along with the leading colon.
The following addressing modes are understood:
%a6
is also known as `%fp', the Frame Pointer.
The number may be omitted.
The onumber or the register, but not both, may be omitted.
The number may be omitted. Omitting the register produces the Postindex addressing mode.
The standard Motorola syntax for this chip differs from the syntax
already discussed (see section Syntax). as can
accept Motorola syntax for operands, even if MIT syntax is used for
other operands in the same instruction. The two kinds of syntax are
fully compatible.
In the following table apc stands for any of the address registers (`%a0' through `%a7'), the program counter (`%pc'), the zero-address relative to the program counter (`%zpc'), or a suppressed address register (`%za0' through `%za7'). The use of size means one of `w' or `l', and it may always be omitted along with the leading dot. The use of scale means one of `1', `2', `4', or `8', and it may always be omitted along with the leading asterisk.
The following additional addressing modes are understood:
%a6
is also known as `%fp', the Frame Pointer.
The number may also appear within the parentheses, as in `(number,%a0)'. When used with the pc, the number may be omitted (with an address register, omitting the number produces Address Register Indirect mode).
The number may be omitted, or it may appear within the parentheses. The apc may be omitted. The register and the apc may appear in either order. If both apc and register are address registers, and the size and scale are omitted, then the first register is taken as the base register, and the second as the index register.
The onumber, or the register, or both, may be omitted. Either the number or the apc may be omitted, but not both.
The number, or the apc, or the register, or any two of them, may be omitted. The onumber may be omitted. The register and the apc may appear in either order. If both apc and register are address registers, and the size and scale are omitted, then the first register is taken as the base register, and the second as the index register.
Packed decimal (P) format floating literals are not supported. Feel free to add the code!
The floating point formats generated by directives are these.
.float
Single precision floating point constants.
.double
Double precision floating point constants.
There is no directive to produce regions of memory holding extended precision numbers, however they can be used as immediate operands to floating-point instructions. Adding a directive to create extended precision numbers would not be hard, but it has not yet seemed necessary.
In order to be compatible with the Sun assembler the 680x0 assembler understands the following directives.
.data1
.data 1 directive.
.data2
.data 2 directive.
.even
.align directive; it
aligns the output to an even byte boundary.
.skip
.space directive.
Certain pseudo opcodes are permitted for branch instructions. They expand to the shortest branch instruction that reach the target. Generally these mnemonics are made by substituting `j' for `b' at the start of a Motorola mnemonic.
The following table summarizes the pseudo-operations. A * flags
cases that are more fully described after the table:
Displacement
+-------------------------------------------------
| 68020 68000/10
Pseudo-Op |BYTE WORD LONG LONG non-PC relative
+-------------------------------------------------
jbsr |bsrs bsr bsrl jsr jsr
jra |bras bra bral jmp jmp
* jXX |bXXs bXX bXXl bNXs;jmpl bNXs;jmp
* dbXX |dbXX dbXX dbXX; bra; jmpl
* fjXX |fbXXw fbXXw fbXXl fbNXw;jmp
XX: condition
NX: negative of condition XX
*---see full description below
jbsr
jra
jXX
jhi jls jcc jcs jne jeq jvc jvs jpl jmi jge jlt jgt jle
For the cases of non-PC relative displacements and long displacements on
the 68000 or 68010, as issues a longer code fragment in terms of
NX, the opposite condition to XX. For example, for the
non-PC relative case:
jXX foo
gives
bNXs oof
jmp foo
oof:
dbXX
dbhi dbls dbcc dbcs dbne dbeq dbvc dbvs dbpl dbmi dbge dblt dbgt dble dbf dbra dbt
Other than for word and byte displacements, when the source reads
`dbXX foo', as emits
dbXX oo1
bra oo2
oo1:jmpl foo
oo2:
fjXX
fjne fjeq fjge fjlt fjgt fjle fjf fjt fjgl fjgle fjnge fjngl fjngle fjngt fjnle fjnlt fjoge fjogl fjogt fjole fjolt fjor fjseq fjsf fjsne fjst fjueq fjuge fjugt fjule fjult fjun
For branch targets that are not PC relative, as emits
fbNX oof
jmp foo
oof:
when it encounters `fjXX foo'.
The immediate character is `#' for Sun compatibility. The line-comment character is `|'. If a `#' appears at the beginning of a line, it is treated as a comment unless it looks like `# line file', in which case it is treated normally.
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