6.111 (Spring 2005):
Course Description: Lectures and labs on digital logic, flipflops, PALs, FPGA's, counters, timing, synchronization, and finite-state machines prepare students for the design and implementation of a final project of their choice: games, music, digital filters, wireless communictions, graphics, video, etc. Extensive use of Verilog for describing and implementating digital logic designs. Students engage in extensive written and oral communication exercises. Six extra units possible via registration for 6.905 after project proposal. 12 Engineering Design Points. Prereq: 6.002 or 6.071 or 16.040 Units: 3-7-2
Lecture: MWF1 (34-101), Recitations:
F1 (R1: 36-144, R2: 34-304, R3: 36-155); Either lecture or recitations
will be held on Fridays at 1PM
Anantha Chandrakasan (firstname.lastname@example.org, ph: 8-7619, office hours in 38-107, M: 2-3PM and W: 11-12 or by appointment)
TAs: Chris Forker (email@example.com), Charlie Kehoe (firstname.lastname@example.org) and Hyunjoo Jenny Lee (email@example.com) -- ph: 3-7350, office hours in 38-684
LAs: Nathan Ackerman (njacker@MIT.EDU) and Amir Hirsch (amirh@MIT.EDU)
Recitation Assignments (requires MIT CA certificate)
Schedules of Lecturer, Teaching Assistants, and Lab Aides
Logic Design: Randy Katz, Gaetano Borriello, Contemporary Logic Design, Pearson Education, 2005.
Verilog: Samir Palnitkar, Verilog HDL, Pearson Education (2nd edition).
Problem Sets and Solutions
Final Project Information
Spring 2005 Final Projects (Including Videos of the Project Presentations)