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Hierarchy
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Modules
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Hierarchy for fft_sample
fft_sample
BUFG
DCM
SRL16
adc_driver
debounce
display_16hex
fft_256pt_8bit
XFFT_V3_1
math_8bit_mult
x 2
MULT_GEN_V7_0
offset_to_twos
vga_graph2_buf
vga_sync
Unconnected modules
twos_to_offset
Hierarchy
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This page:
Created:
Thu Dec 8 21:40:41 2005
Verilog converted to html by
v2html 7.30
(written by
Costas Calamvokis
).
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