assign n222 = BU1601_q[31];
assign n221 = BU1601_q[30];
assign n220 = BU1601_q[29];
assign n219 = BU1601_q[28];
assign n218 = BU1601_q[27];
assign n217 = BU1601_q[26];
assign n216 = BU1601_q[25];
assign n215 = BU1601_q[24];
assign n214 = BU1601_q[23];
assign n213 = BU1601_q[22];
assign n212 = BU1601_q[21];
assign n211 = BU1601_q[20];
assign n210 = BU1601_q[19];
assign n209 = BU1601_q[18];
assign n208 = BU1601_q[17];
assign n207 = BU1601_q[16];
assign n206 = BU1601_q[15];
assign n205 = BU1601_q[14];
assign n204 = BU1601_q[13];
assign n203 = BU1601_q[12];
assign n202 = BU1601_q[11];
assign n201 = BU1601_q[10];
assign n200 = BU1601_q[9];
assign n199 = BU1601_q[8];
assign n198 = BU1601_q[7];
assign n197 = BU1601_q[6];
assign n196 = BU1601_q[5];
assign n195 = BU1601_q[4];
assign n194 = BU1601_q[3];
assign n193 = BU1601_q[2];
assign n192 = BU1601_q[1];
assign n191 = BU1601_q[0];
wire BU1601_a_signed;
assign BU1601_a_signed = 1'b0;
wire BU1601_loadb;
assign BU1601_loadb = 1'b0;
wire BU1601_load_done;
wire BU1601_swapb;
assign BU1601_swapb = 1'b0;
wire BU1601_ce;
assign BU1601_ce = n660;
wire BU1601_aclr;
assign BU1601_aclr = 1'b0;
wire BU1601_sclr;
assign BU1601_sclr = 1'b0;
wire BU1601_rfd;
wire BU1601_nd;
assign BU1601_nd = 1'b0;
wire BU1601_rdy;
MULT_GEN_V7_0 #(
8 /* bram_addr_width*/,
0 /* c_a_type*/,
18 /* c_a_width*/,
18 /* c_baat*/,
0 /* c_b_constant*/,
1 /* c_b_type*/,
"0000000000000001" /* c_b_value*/,
17 /* c_b_width*/,
0 /* c_enable_rlocs*/,
0 /* c_has_aclr*/,
0 /* c_has_a_signed*/,
1 /* c_has_b*/,
1 /* c_has_ce*/,
0 /* c_has_loadb*/,
0 /* c_has_load_done*/,
0 /* c_has_nd*/,
0 /* c_has_o*/,
1 /* c_has_q*/,
0 /* c_has_rdy*/,
0 /* c_has_rfd*/,
0 /* c_has_sclr*/,
0 /* c_has_swapb*/,
"mem" /* c_mem_init_prefix*/,
0 /* c_mem_type*/,
1 /* c_mult_type*/,
0 /* c_output_hold*/,
35 /* c_out_width*/,
1 /* c_pipeline*/,
0 /* c_reg_a_b_inputs*/,
0 /* c_sqm_type*/,
0 /* c_stack_adders*/,
0 /* c_standalone*/,
1 /* c_sync_enable*/,
1 /* c_use_luts*/,
0 /* c_v2_speed*/
)
BU1601(
.CLK(BU1601_clk),
.A(BU1601_a),
.B(BU1601_b),
.O(BU1601_o),
.Q(BU1601_q),
.A_SIGNED(BU1601_a_signed),
.LOADB(BU1601_loadb),
.LOAD_DONE(BU1601_load_done),
.SWAPB(BU1601_swapb),
.CE(BU1601_ce),
.ACLR(BU1601_aclr),
.SCLR(BU1601_sclr),
.RFD(BU1601_rfd),
.ND(BU1601_nd),
.RDY(BU1601_rdy)
);
wire [34 : 0] BU2047_A;
assign BU2047_A[0] = 1'b0;
assign BU2047_A[1] = 1'b0;
assign BU2047_A[2] = 1'b0;
assign BU2047_A[3] = 1'b0;
assign BU2047_A[4] = 1'b0;
assign BU2047_A[5] = 1'b0;
assign BU2047_A[6] = 1'b0;
assign BU2047_A[7] = 1'b0;
assign BU2047_A[8] = 1'b0;
assign BU2047_A[9] = 1'b0;
assign BU2047_A[10] = 1'b0;
assign BU2047_A[11] = 1'b0;
assign BU2047_A[12] = 1'b0;
assign BU2047_A[13] = 1'b0;
assign BU2047_A[14] = 1'b0;
assign BU2047_A[15] = 1'b0;
assign BU2047_A[16] = 1'b0;
assign BU2047_A[17] = n385;
assign BU2047_A[18] = n386;
assign BU2047_A[19] = n387;
assign BU2047_A[20] = n388;
assign BU2047_A[21] = n389;
assign BU2047_A[22] = n390;
assign BU2047_A[23] = n391;
assign BU2047_A[24] = n392;
assign BU2047_A[25] = n393;
assign BU2047_A[26] = n394;
assign BU2047_A[27] = n395;
assign BU2047_A[28] = n396;
assign BU2047_A[29] = n397;
assign BU2047_A[30] = n398;
assign BU2047_A[31] = n399;
assign BU2047_A[32] = n400;
assign BU2047_A[33] = n401;
assign BU2047_A[34] = n402;
wire [34 : 0] BU2047_B;
assign BU2047_B[0] = n191;
assign BU2047_B[1] = n192;
assign BU2047_B[2] = n193;
assign BU2047_B[3] = n194;
assign BU2047_B[4] = n195;
assign BU2047_B[5] = n196;
assign BU2047_B[6] = n197;
assign BU2047_B[7] = n198;
assign BU2047_B[8] = n199;
assign BU2047_B[9] = n200;
assign BU2047_B[10] = n201;
assign BU2047_B[11] = n202;
assign BU2047_B[12] = n203;
assign BU2047_B[13] = n204;
assign BU2047_B[14] = n205;
assign BU2047_B[15] = n206;
assign BU2047_B[16] = n207;
assign BU2047_B[17] = n208;
assign BU2047_B[18] = n209;
assign BU2047_B[19] = n210;
assign BU2047_B[20] = n211;
assign BU2047_B[21] = n212;
assign BU2047_B[22] = n213;
assign BU2047_B[23] = n214;
assign BU2047_B[24] = n215;
assign BU2047_B[25] = n216;
assign BU2047_B[26] = n217;
assign BU2047_B[27] = n218;
assign BU2047_B[28] = n219;
assign BU2047_B[29] = n220;
assign BU2047_B[30] = n221;
assign BU2047_B[31] = n222;
assign BU2047_B[32] = n223;
assign BU2047_B[33] = n224;
assign BU2047_B[34] = n225;
wire BU2047_Q_OVFL;
assign n578 = BU2047_Q_OVFL;
wire [34 : 0] BU2047_Q;
assign n508 = BU2047_Q[0];
assign n509 = BU2047_Q[1];
assign n510 = BU2047_Q[2];
assign n511 = BU2047_Q[3];
assign n512 = BU2047_Q[4];
assign n513 = BU2047_Q[5];
assign n514 = BU2047_Q[6];
assign n515 = BU2047_Q[7];
assign n516 = BU2047_Q[8];
assign n517 = BU2047_Q[9];
assign n518 = BU2047_Q[10];
assign n519 = BU2047_Q[11];
assign n520 = BU2047_Q[12];
assign n521 = BU2047_Q[13];
assign n522 = BU2047_Q[14];
assign n523 = BU2047_Q[15];
assign n524 = BU2047_Q[16];
assign n525 = BU2047_Q[17];
assign n526 = BU2047_Q[18];
assign n527 = BU2047_Q[19];
assign n528 = BU2047_Q[20];
assign n529 = BU2047_Q[21];
assign n530 = BU2047_Q[22];
assign n531 = BU2047_Q[23];
assign n532 = BU2047_Q[24];
assign n533 = BU2047_Q[25];
assign n534 = BU2047_Q[26];
assign n535 = BU2047_Q[27];
assign n536 = BU2047_Q[28];
assign n537 = BU2047_Q[29];
assign n538 = BU2047_Q[30];
assign n539 = BU2047_Q[31];
assign n540 = BU2047_Q[32];
assign n541 = BU2047_Q[33];
assign n542 = BU2047_Q[34];
wire BU2047_CLK;
assign BU2047_CLK = n659;
wire BU2047_CE;
assign BU2047_CE = n660;
C_ADDSUB_V7_0 #(
1 /* c_add_mode*/,
"0" /* c_ainit_val*/,
0 /* c_a_type*/,
35 /* c_a_width*/,
0 /* c_bypass_enable*/,
0 /* c_bypass_low*/,
0 /* c_b_constant*/,
0 /* c_b_type*/,
"00000000000000000000000000000000000" /* c_b_value*/,
35 /* c_b_width*/,
0 /* c_enable_rlocs*/,
0 /* c_has_aclr*/,
0 /* c_has_add*/,
0 /* c_has_ainit*/,
0 /* c_has_aset*/,
0 /* c_has_a_signed*/,
0 /* c_has_bypass*/,
0 /* c_has_bypass_with_cin*/,
0 /* c_has_b_in*/,
0 /* c_has_b_out*/,
0 /* c_has_b_signed*/,
1 /* c_has_ce*/,
0 /* c_has_c_in*/,
0 /* c_has_c_out*/,
0 /* c_has_ovfl*/,
1 /* c_has_q*/,
0 /* c_has_q_b_out*/,
0 /* c_has_q_c_out*/,
1 /* c_has_q_ovfl*/,
1 /* c_has_s*/,
0 /* c_has_sclr*/,
0 /* c_has_sinit*/,
0 /* c_has_sset*/,
34 /* c_high_bit*/,
1 /* c_latency*/,
0 /* c_low_bit*/,
35 /* c_out_width*/,
0 /* c_pipe_stages*/,
"0" /* c_sinit_val*/,
0 /* c_sync_enable*/,
0 /* c_sync_priority*/
)
BU2047(
.A(BU2047_A),
.B(BU2047_B),
.Q_OVFL(BU2047_Q_OVFL),
.Q(BU2047_Q),
.CLK(BU2047_CLK),
.CE(BU2047_CE)
);
wire BU1929_CLK;
assign BU1929_CLK = n659;
wire [17 : 0] BU1929_D;
assign BU1929_D[0] = n81;
assign BU1929_D[1] = n82;
assign BU1929_D[2] = n83;
assign BU1929_D[3] = n84;
assign BU1929_D[4] = n85;
assign BU1929_D[5] = n86;
assign BU1929_D[6] = n87;
assign BU1929_D[7] = n88;
assign BU1929_D[8] = n89;
assign BU1929_D[9] = n90;
assign BU1929_D[10] = n91;
assign BU1929_D[11] = n92;
assign BU1929_D[12] = n93;
assign BU1929_D[13] = n94;
assign BU1929_D[14] = n95;
assign BU1929_D[15] = n96;
assign BU1929_D[16] = n97;
assign BU1929_D[17] = n98;
wire [17 : 0] BU1929_Q;
assign n385 = BU1929_Q[0];
assign n386 = BU1929_Q[1];
assign n387 = BU1929_Q[2];
assign n388 = BU1929_Q[3];
assign n389 = BU1929_Q[4];
assign n390 = BU1929_Q[5];
assign n391 = BU1929_Q[6];
assign n392 = BU1929_Q[7];
assign n393 = BU1929_Q[8];
assign n394 = BU1929_Q[9];
assign n395 = BU1929_Q[10];
assign n396 = BU1929_Q[11];
assign n397 = BU1929_Q[12];
assign n398 = BU1929_Q[13];
assign n399 = BU1929_Q[14];
assign n400 = BU1929_Q[15];
assign n401 = BU1929_Q[16];
assign n402 = BU1929_Q[17];
wire BU1929_CE;
assign BU1929_CE = n660;
C_SHIFT_RAM_V7_0 #(
1 /* c_addr_width*/,
"000000000000000000" /* c_ainit_val*/,
"0" /* c_default_data*/,
2 /* c_default_data_radix*/,
3 /* c_depth*/,
0 /* c_enable_rlocs*/,
0 /* c_generate_mif*/,
0 /* c_has_a*/,
0 /* c_has_aclr*/,
0 /* c_has_ainit*/,
0 /* c_has_aset*/,
1 /* c_has_ce*/,
0 /* c_has_sclr*/,
0 /* c_has_sinit*/,
0 /* c_has_sset*/,
"null" /* c_mem_init_file*/,
2 /* c_mem_init_radix*/,
0 /* c_read_mif*/,
1 /* c_reg_last_bit*/,
0 /* c_shift_type*/,
"000000000000000000" /* c_sinit_val*/,
0 /* c_sync_enable*/,
0 /* c_sync_priority*/,
18 /* c_width*/
)
BU1929(
.CLK(BU1929_CLK),
.D(BU1929_D),
.Q(BU1929_Q),
.CE(BU1929_CE)
);
wire BU1802_clk;
assign BU1802_clk = n659;
wire [17 : 0] BU1802_a;
assign BU1802_a[17] = n313;
assign BU1802_a[16] = n312;
assign BU1802_a[15] = n311;
assign BU1802_a[14] = n310;
assign BU1802_a[13] = n309;
assign BU1802_a[12] = n308;
assign BU1802_a[11] = n307;
assign BU1802_a[10] = n306;
assign BU1802_a[9] = n305;
assign BU1802_a[8] = n304;
assign BU1802_a[7] = n303;
assign BU1802_a[6] = n302;
assign BU1802_a[5] = n301;
assign BU1802_a[4] = n300;
assign BU1802_a[3] = n299;
assign BU1802_a[2] = n298;
assign BU1802_a[1] = n297;
assign BU1802_a[0] = n296;
wire [16 : 0] BU1802_b;
assign BU1802_b[16] = n330;
assign BU1802_b[15] = n329;
assign BU1802_b[14] = n328;
assign BU1802_b[13] = n327;
assign BU1802_b[12] = n326;
assign BU1802_b[11] = n325;
assign BU1802_b[10] = n324;
assign BU1802_b[9] = n323;
assign BU1802_b[8] = n322;
assign BU1802_b[7] = n321;
assign BU1802_b[6] = n320;
assign BU1802_b[5] = n319;
assign BU1802_b[4] = n318;
assign BU1802_b[3] = n317;
assign BU1802_b[2] = n316;
assign BU1802_b[1] = n315;
assign BU1802_b[0] = n314;
wire [34 : 0] BU1802_o;
wire [34 : 0] BU1802_q;
assign n295 = BU1802_q[34];
assign n294 = BU1802_q[33];
assign n293 = BU1802_q[32];
assign n292 = BU1802_q[31];
assign n291 = BU1802_q[30];
assign n290 = BU1802_q[29];
assign n289 = BU1802_q[28];
assign n288 = BU1802_q[27];
assign n287 = BU1802_q[26];
assign n286 = BU1802_q[25];
assign n285 = BU1802_q[24];
assign n284 = BU1802_q[23];
assign n283 = BU1802_q[22];
assign n282 = BU1802_q[21];
assign n281 = BU1802_q[20];
assign n280 = BU1802_q[19];
assign n279 = BU1802_q[18];
assign n278 = BU1802_q[17];
assign n277 = BU1802_q[16];
assign n276 = BU1802_q[15];
assign n275 = BU1802_q[14];
assign n274 = BU1802_q[13];
assign n273 = BU1802_q[12];
assign n272 = BU1802_q[11];
assign n271 = BU1802_q[10];
assign n270 = BU1802_q[9];
assign n269 = BU1802_q[8];
assign n268 = BU1802_q[7];
assign n267 = BU1802_q[6];
assign n266 = BU1802_q[5];
assign n265 = BU1802_q[4];
assign n264 = BU1802_q[3];
assign n263 = BU1802_q[2];
assign n262 = BU1802_q[1];
assign n261 = BU1802_q[0];
wire BU1802_a_signed;
assign BU1802_a_signed = 1'b0;
wire BU1802_loadb;
assign BU1802_loadb = 1'b0;
wire BU1802_load_done;
wire BU1802_swapb;
assign BU1802_swapb = 1'b0;
wire BU1802_ce;
assign BU1802_ce = n660;
wire BU1802_aclr;
assign BU1802_aclr = 1'b0;
wire BU1802_sclr;
assign BU1802_sclr = 1'b0;
wire BU1802_rfd;
wire BU1802_nd;
assign BU1802_nd = 1'b0;
wire BU1802_rdy;
MULT_GEN_V7_0 #(
8 /* bram_addr_width*/,
0 /* c_a_type*/,
18 /* c_a_width*/,
18 /* c_baat*/,
0 /* c_b_constant*/,
1 /* c_b_type*/,
"0000000000000001" /* c_b_value*/,
17 /* c_b_width*/,
0 /* c_enable_rlocs*/,
0 /* c_has_aclr*/,
0 /* c_has_a_signed*/,
1 /* c_has_b*/,
1 /* c_has_ce*/,
0 /* c_has_loadb*/,
0 /* c_has_load_done*/,
0 /* c_has_nd*/,
0 /* c_has_o*/,
1 /* c_has_q*/,
0 /* c_has_rdy*/,
0 /* c_has_rfd*/,
0 /* c_has_sclr*/,
0 /* c_has_swapb*/,
"mem" /* c_mem_init_prefix*/,
0 /* c_mem_type*/,
1 /* c_mult_type*/,
0 /* c_output_hold*/,
35 /* c_out_width*/,
1 /* c_pipeline*/,
0 /* c_reg_a_b_inputs*/,
0 /* c_sqm_type*/,
0 /* c_stack_adders*/,
0 /* c_standalone*/,
1 /* c_sync_enable*/,
1 /* c_use_luts*/,
0 /* c_v2_speed*/
)
BU1802(
.CLK(BU1802_clk),
.A(BU1802_a),
.B(BU1802_b),
.O(BU1802_o),
.Q(BU1802_q),
.A_SIGNED(BU1802_a_signed),
.LOADB(BU1802_loadb),
.LOAD_DONE(BU1802_load_done),
.SWAPB(BU1802_swapb),
.CE(BU1802_ce),
.ACLR(BU1802_aclr),
.SCLR(BU1802_sclr),
.RFD(BU1802_rfd),
.ND(BU1802_nd),
.RDY(BU1802_rdy)
);
wire [34 : 0] BU2615_A;
assign BU2615_A[0] = 1'b0;
assign BU2615_A[1] = 1'b0;
assign BU2615_A[2] = 1'b0;
assign BU2615_A[3] = 1'b0;
assign BU2615_A[4] = 1'b0;
assign BU2615_A[5] = 1'b0;
assign BU2615_A[6] = 1'b0;
assign BU2615_A[7] = 1'b0;
assign BU2615_A[8] = 1'b0;
assign BU2615_A[9] = 1'b0;
assign BU2615_A[10] = 1'b0;
assign BU2615_A[11] = 1'b0;
assign BU2615_A[12] = 1'b0;
assign BU2615_A[13] = 1'b0;
assign BU2615_A[14] = 1'b0;
assign BU2615_A[15] = 1'b0;
assign BU2615_A[16] = 1'b0;
assign BU2615_A[17] = n455;
assign BU2615_A[18] = n456;
assign BU2615_A[19] = n457;
assign BU2615_A[20] = n458;
assign BU2615_A[21] = n459;
assign BU2615_A[22] = n460;
assign BU2615_A[23] = n461;
assign BU2615_A[24] = n462;
assign BU2615_A[25] = n463;
assign BU2615_A[26] = n464;
assign BU2615_A[27] = n465;
assign BU2615_A[28] = n466;
assign BU2615_A[29] = n467;
assign BU2615_A[30] = n468;
assign BU2615_A[31] = n469;
assign BU2615_A[32] = n470;
assign BU2615_A[33] = n471;
assign BU2615_A[34] = n472;
wire [34 : 0] BU2615_B;
assign BU2615_B[0] = n261;
assign BU2615_B[1] = n262;
assign BU2615_B[2] = n263;
assign BU2615_B[3] = n264;
assign BU2615_B[4] = n265;
assign BU2615_B[5] = n266;
assign BU2615_B[6] = n267;
assign BU2615_B[7] = n268;
assign BU2615_B[8] = n269;
assign BU2615_B[9] = n270;
assign BU2615_B[10] = n271;
assign BU2615_B[11] = n272;
assign BU2615_B[12] = n273;
assign BU2615_B[13] = n274;
assign BU2615_B[14] = n275;
assign BU2615_B[15] = n276;
assign BU2615_B[16] = n277;
assign BU2615_B[17] = n278;
assign BU2615_B[18] = n279;
assign BU2615_B[19] = n280;
assign BU2615_B[20] = n281;
assign BU2615_B[21] = n282;
assign BU2615_B[22] = n283;
assign BU2615_B[23] = n284;
assign BU2615_B[24] = n285;
assign BU2615_B[25] = n286;
assign BU2615_B[26] = n287;
assign BU2615_B[27] = n288;
assign BU2615_B[28] = n289;
assign BU2615_B[29] = n290;
assign BU2615_B[30] = n291;
assign BU2615_B[31] = n292;
assign BU2615_B[32] = n293;
assign BU2615_B[33] = n294;
assign BU2615_B[34] = n295;
wire BU2615_Q_OVFL;
assign n579 = BU2615_Q_OVFL;
wire [34 : 0] BU2615_Q;
assign n543 = BU2615_Q[0];
assign n544 = BU2615_Q[1];
assign n545 = BU2615_Q[2];
assign n546 = BU2615_Q[3];
assign n547 = BU2615_Q[4];
assign n548 = BU2615_Q[5];
assign n549 = BU2615_Q[6];
assign n550 = BU2615_Q[7];
assign n551 = BU2615_Q[8];
assign n552 = BU2615_Q[9];
assign n553 = BU2615_Q[10];
assign n554 = BU2615_Q[11];
assign n555 = BU2615_Q[12];
assign n556 = BU2615_Q[13];
assign n557 = BU2615_Q[14];
assign n558 = BU2615_Q[15];
assign n559 = BU2615_Q[16];
assign n560 = BU2615_Q[17];
assign n561 = BU2615_Q[18];
assign n562 = BU2615_Q[19];
assign n563 = BU2615_Q[20];
assign n564 = BU2615_Q[21];
assign n565 = BU2615_Q[22];
assign n566 = BU2615_Q[23];
assign n567 = BU2615_Q[24];
assign n568 = BU2615_Q[25];
assign n569 = BU2615_Q[26];
assign n570 = BU2615_Q[27];
assign n571 = BU2615_Q[28];
assign n572 = BU2615_Q[29];
assign n573 = BU2615_Q[30];
assign n574 = BU2615_Q[31];
assign n575 = BU2615_Q[32];
assign n576 = BU2615_Q[33];
assign n577 = BU2615_Q[34];
wire BU2615_CLK;
assign BU2615_CLK = n659;
wire BU2615_CE;
assign BU2615_CE = n660;
C_ADDSUB_V7_0 #(
0 /* c_add_mode*/,
"0" /* c_ainit_val*/,
0 /* c_a_type*/,
35 /* c_a_width*/,
0 /* c_bypass_enable*/,
0 /* c_bypass_low*/,
0 /* c_b_constant*/,
0 /* c_b_type*/,
"00000000000000000000000000000000000" /* c_b_value*/,
35 /* c_b_width*/,
0 /* c_enable_rlocs*/,
0 /* c_has_aclr*/,
0 /* c_has_add*/,
0 /* c_has_ainit*/,
0 /* c_has_aset*/,
0 /* c_has_a_signed*/,
0 /* c_has_bypass*/,
0 /* c_has_bypass_with_cin*/,
0 /* c_has_b_in*/,
0 /* c_has_b_out*/,
0 /* c_has_b_signed*/,
1 /* c_has_ce*/,
0 /* c_has_c_in*/,
0 /* c_has_c_out*/,
0 /* c_has_ovfl*/,
1 /* c_has_q*/,
0 /* c_has_q_b_out*/,
0 /* c_has_q_c_out*/,
1 /* c_has_q_ovfl*/,
1 /* c_has_s*/,
0 /* c_has_sclr*/,
0 /* c_has_sinit*/,
0 /* c_has_sset*/,
34 /* c_high_bit*/,
1 /* c_latency*/,
0 /* c_low_bit*/,
35 /* c_out_width*/,
0 /* c_pipe_stages*/,
"0" /* c_sinit_val*/,
0 /* c_sync_enable*/,
0 /* c_sync_priority*/
)
BU2615(
.A(BU2615_A),
.B(BU2615_B),
.Q_OVFL(BU2615_Q_OVFL),
.Q(BU2615_Q),
.CLK(BU2615_CLK),
.CE(BU2615_CE)
);
wire BU1988_CLK;
assign BU1988_CLK = n659;
wire [17 : 0] BU1988_D;
assign BU1988_D[0] = n63;
assign BU1988_D[1] = n64;
assign BU1988_D[2] = n65;
assign BU1988_D[3] = n66;
assign BU1988_D[4] = n67;
assign BU1988_D[5] = n68;
assign BU1988_D[6] = n69;
assign BU1988_D[7] = n70;
assign BU1988_D[8] = n71;
assign BU1988_D[9] = n72;
assign BU1988_D[10] = n73;
assign BU1988_D[11] = n74;
assign BU1988_D[12] = n75;
assign BU1988_D[13] = n76;
assign BU1988_D[14] = n77;
assign BU1988_D[15] = n78;
assign BU1988_D[16] = n79;
assign BU1988_D[17] = n80;
wire [17 : 0] BU1988_Q;
assign n455 = BU1988_Q[0];
assign n456 = BU1988_Q[1];
assign n457 = BU1988_Q[2];
assign n458 = BU1988_Q[3];
assign n459 = BU1988_Q[4];
assign n460 = BU1988_Q[5];
assign n461 = BU1988_Q[6];
assign n462 = BU1988_Q[7];
assign n463 = BU1988_Q[8];
assign n464 = BU1988_Q[9];
assign n465 = BU1988_Q[10];
assign n466 = BU1988_Q[11];
assign n467 = BU1988_Q[12];
assign n468 = BU1988_Q[13];
assign n469 = BU1988_Q[14];
assign n470 = BU1988_Q[15];
assign n471 = BU1988_Q[16];
assign n472 = BU1988_Q[17];
wire BU1988_CE;
assign BU1988_CE = n660;
C_SHIFT_RAM_V7_0 #(
1 /* c_addr_width*/,
"000000000000000000" /* c_ainit_val*/,
"0" /* c_default_data*/,
2 /* c_default_data_radix*/,
3 /* c_depth*/,
0 /* c_enable_rlocs*/,
0 /* c_generate_mif*/,
0 /* c_has_a*/,
0 /* c_has_aclr*/,
0 /* c_has_ainit*/,
0 /* c_has_aset*/,
1 /* c_has_ce*/,
0 /* c_has_sclr*/,
0 /* c_has_sinit*/,
0 /* c_has_sset*/,
"null" /* c_mem_init_file*/,
2 /* c_mem_init_radix*/,
0 /* c_read_mif*/,
1 /* c_reg_last_bit*/,
0 /* c_shift_type*/,
"000000000000000000" /* c_sinit_val*/,
0 /* c_sync_enable*/,
0 /* c_sync_priority*/,
18 /* c_width*/
)
BU1988(
.CLK(BU1988_CLK),
.D(BU1988_D),
.Q(BU1988_Q),
.CE(BU1988_CE)
);
wire [0 : 0] BU2326_D;
assign BU2326_D[0] = n6460;
wire [0 : 0] BU2326_Q;
assign n6428 = BU2326_Q[0];
wire BU2326_CLK;
assign BU2326_CLK = n659;
wire BU2326_CE;
assign BU2326_CE = n660;
C_REG_FD_V7_0 #(
"0" /* c_ainit_val*/,
0 /* c_enable_rlocs*/,
0 /* c_has_aclr*/,
0 /* c_has_ainit*/,
0 /* c_has_aset*/,
1 /* c_has_ce*/,
0 /* c_has_sclr*/,
0 /* c_has_sinit*/,
0 /* c_has_sset*/,
"0" /* c_sinit_val*/,
0 /* c_sync_enable*/,
0 /* c_sync_priority*/,
1 /* c_width*/
)
BU2326(
.D(BU2326_D),
.Q(BU2326_Q),
.CLK(BU2326_CLK),
.CE(BU2326_CE)
);
defparam BU2330.INIT = 'hc4c4;
wire BU2330_I0;
assign BU2330_I0 = n6404;
wire BU2330_I1;
assign BU2330_I1 = n522;
wire BU2330_I2;
assign BU2330_I2 = n6445;
wire BU2330_I3;
assign BU2330_I3 = 1'b0;
wire BU2330_O;
assign n6460 = BU2330_O;
LUT4 BU2330(
.I0(BU2330_I0),
.I1(BU2330_I1),
.I2(BU2330_I2),
.I3(BU2330_I3),
.O(BU2330_O)
);
wire [13 : 0] BU2307_I;
assign BU2307_I[0] = n508;
assign BU2307_I[1] = n509;
assign BU2307_I[2] = n510;
assign BU2307_I[3] = n511;
assign BU2307_I[4] = n512;
assign BU2307_I[5] = n513;
assign BU2307_I[6] = n514;
assign BU2307_I[7] = n515;
assign BU2307_I[8] = n516;
assign BU2307_I[9] = n517;
assign BU2307_I[10] = n518;
assign BU2307_I[11] = n519;
assign BU2307_I[12] = n520;
assign BU2307_I[13] = n521;
wire BU2307_T;
assign BU2307_T = 1'b0;
wire BU2307_EN;
assign BU2307_EN = 1'b0;
wire BU2307_Q;
wire BU2307_CLK;
assign BU2307_CLK = 1'b0;
wire BU2307_CE;
assign BU2307_CE = 1'b0;
wire BU2307_ACLR;
assign BU2307_ACLR = 1'b0;
wire BU2307_ASET;
assign BU2307_ASET = 1'b0;
wire BU2307_AINIT;
assign BU2307_AINIT = 1'b0;
wire BU2307_SCLR;
assign BU2307_SCLR = 1'b0;
wire BU2307_SSET;
assign BU2307_SSET = 1'b0;
wire BU2307_SINIT;
assign BU2307_SINIT = 1'b0;
wire BU2307_O;
assign n6445 = BU2307_O;
C_GATE_BIT_V7_0 #(
"0" /* c_ainit_val*/,
0 /* c_enable_rlocs*/,
2 /* c_gate_type*/,
0 /* c_has_aclr*/,
0 /* c_has_ainit*/,
0 /* c_has_aset*/,
0 /* c_has_ce*/,
1 /* c_has_o*/,
1 /* c_has_q*/,
0 /* c_has_sclr*/,
0 /* c_has_sinit*/,
0 /* c_has_sset*/,
14 /* c_inputs*/,
"000000000000000" /* c_input_inv_mask*/,
0 /* c_pipe_stages*/,
"0" /* c_sinit_val*/,
0 /* c_sync_enable*/,
1 /* c_sync_priority*/
)
BU2307(
.I(BU2307_I),
.T(BU2307_T),
.EN(BU2307_EN),
.Q(BU2307_Q),
.CLK(BU2307_CLK),
.CE(BU2307_CE),
.ACLR(BU2307_ACLR),
.ASET(BU2307_ASET),
.AINIT(BU2307_AINIT),
.SCLR(BU2307_SCLR),
.SSET(BU2307_SSET),
.SINIT(BU2307_SINIT),
.O(BU2307_O)
);
wire [19 : 0] BU2266_D;
assign BU2266_D[0] = n523;
assign BU2266_D[1] = n524;
assign BU2266_D[2] = n525;
assign BU2266_D[3] = n526;
assign BU2266_D[4] = n527;
assign BU2266_D[5] = n528;
assign BU2266_D[6] = n529;
assign BU2266_D[7] = n530;
assign BU2266_D[8] = n531;
assign BU2266_D[9] = n532;
assign BU2266_D[10] = n533;
assign BU2266_D[11] = n534;
assign BU2266_D[12] = n535;
assign BU2266_D[13] = n536;
assign BU2266_D[14] = n537;
assign BU2266_D[15] = n538;
assign BU2266_D[16] = n539;
assign BU2266_D[17] = n540;
assign BU2266_D[18] = n541;
assign BU2266_D[19] = n542;
wire [19 : 0] BU2266_Q;
assign n6385 = BU2266_Q[0];
assign n6386 = BU2266_Q[1];
assign n6387 = BU2266_Q[2];
assign n6388 = BU2266_Q[3];
assign n6389 = BU2266_Q[4];
assign n6390 = BU2266_Q[5];
assign n6391 = BU2266_Q[6];
assign n6392 = BU2266_Q[7];
assign n6393 = BU2266_Q[8];
assign n6394 = BU2266_Q[9];
assign n6395 = BU2266_Q[10];
assign n6396 = BU2266_Q[11];
assign n6397 = BU2266_Q[12];
assign n6398 = BU2266_Q[13];
assign n6399 = BU2266_Q[14];
assign n6400 = BU2266_Q[15];
assign n6401 = BU2266_Q[16];
assign n6402 = BU2266_Q[17];
assign n6403 = BU2266_Q[18];
assign n6404 = BU2266_Q[19];
wire BU2266_CLK;
assign BU2266_CLK = n659;
wire BU2266_CE;
assign BU2266_CE = n660;
C_REG_FD_V7_0 #(
"00000000000000000000" /* c_ainit_val*/,
0 /* c_enable_rlocs*/,
0 /* c_has_aclr*/,
0 /* c_has_ainit*/,
0 /* c_has_aset*/,
1 /* c_has_ce*/,
0 /* c_has_sclr*/,
0 /* c_has_sinit*/,
0 /* c_has_sset*/,
"00000000000000000000" /* c_sinit_val*/,
0 /* c_sync_enable*/,
0 /* c_sync_priority*/,
20 /* c_width*/
)
BU2266(
.D(BU2266_D),
.Q(BU2266_Q),
.CLK(BU2266_CLK),
.CE(BU2266_CE)
);
wire BU2461_CLK;
assign BU2461_CLK = n659;
wire [0 : 0] BU2461_D;
assign BU2461_D[0] = n578;
wire [0 : 0] BU2461_Q;
assign n6461 = BU2461_Q[0];
wire BU2461_CE;
assign BU2461_CE = n660;
C_SHIFT_RAM_V7_0 #(
1 /* c_addr_width*/,
"0" /* c_ainit_val*/,
"0" /* c_default_data*/,
2 /* c_default_data_radix*/,
2 /* c_depth*/,
0 /* c_enable_rlocs*/,
0 /* c_generate_mif*/,
0 /* c_has_a*/,
0 /* c_has_aclr*/,
0 /* c_has_ainit*/,
0 /* c_has_aset*/,
1 /* c_has_ce*/,
0 /* c_has_sclr*/,
0 /* c_has_sinit*/,
0 /* c_has_sset*/,
"null" /* c_mem_init_file*/,
2 /* c_mem_init_radix*/,
0 /* c_read_mif*/,
1 /* c_reg_last_bit*/,
0 /* c_shift_type*/,
"0" /* c_sinit_val*/,
0 /* c_sync_enable*/,
0 /* c_sync_priority*/,
1 /* c_width*/
)
BU2461(
.CLK(BU2461_CLK),
.D(BU2461_D),
.Q(BU2461_Q),
.CE(BU2461_CE)
);
wire [0 : 0] BU2469_D;
assign BU2469_D[0] = n6404;
wire [0 : 0] BU2469_Q;
assign n6462 = BU2469_Q[0];
wire BU2469_CLK;
assign BU2469_CLK = n659;
wire BU2469_CE;
assign BU2469_CE = n660;
C_REG_FD_V7_0 #(
"0" /* c_ainit_val*/,
0 /* c_enable_rlocs*/,
0 /* c_has_aclr*/,
0 /* c_has_ainit*/,
0 /* c_has_aset*/,
1 /* c_has_ce*/,
0 /* c_has_sclr*/,
0 /* c_has_sinit*/,
0 /* c_has_sset*/,
"0" /* c_sinit_val*/,
0 /* c_sync_enable*/,
0 /* c_sync_priority*/,
1 /* c_width*/
)
BU2469(
.D(BU2469_D),
.Q(BU2469_Q),
.CLK(BU2469_CLK),
.CE(BU2469_CE)
);
wire [0 : 0] BU2473_D;
assign BU2473_D[0] = n6403;
wire [0 : 0] BU2473_Q;
assign n6463 = BU2473_Q[0];