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Signals index

N
 new : debounce : reg
 next_column : vga : wire
 next_row : vga : wire
 nibble : display_16hex : reg
 noisy : debounce : input
Connects up to:labkit_beta2demo:dbreset:button_enter 
 npc : beta2 : reg
Connects down to:decode:ctl:irq 
 npc_inc : beta2 : wire
 npc_next : beta2 : wire
O
 opcode : decode : input
Connects up to:beta2:ctl:inst 
P
 pcount : vga : reg
 pc_inc : beta2 : reg
 pixel_clk : labkit_beta2demo : wire
Connects down to:vga:dpy:pixel_clk 
 pixel_clk : vga : output wire
Connects up to:labkit_beta2demo:dpy:pixel_clk 
 power_on_reset : labkit_beta2demo : wire
Connects down to:SRL16:reset_sr:Q 
 ps2c : ps2 : input
Connects up to:labkit_beta2demo:kbd:keyboard_clock 
 ps2c : simulate : reg
Connects down to:beta2demo:uut:ps2c 
 ps2c_sync : ps2 : reg
 ps2d : ps2 : input
Connects up to:labkit_beta2demo:kbd:keyboard_data 
 ps2d : simulate : reg
Connects down to:beta2demo:uut:ps2d 
 ps2out : labkit_beta2demo : wire
Connects down to:ps2:kbd:fifo_data , ps2:kbd:fifo_empty , ps2:kbd:fifo_overflow 
R
 ra1 : beta2 : wire
 ra2 : beta2 : wire
 ram0_address : labkit_beta2demo : output
 ram0_adv_ld : labkit_beta2demo : output
 ram0_bwe_b : labkit_beta2demo : output
 ram0_cen_b : labkit_beta2demo : output
 ram0_ce_b : labkit_beta2demo : output
 ram0_clk : labkit_beta2demo : output
 ram0_data : labkit_beta2demo : inout
 ram0_oe_b : labkit_beta2demo : output
 ram0_we_b : labkit_beta2demo : output
 ram1_address : labkit_beta2demo : output
 ram1_adv_ld : labkit_beta2demo : output
 ram1_bwe_b : labkit_beta2demo : output
 ram1_cen_b : labkit_beta2demo : output
 ram1_ce_b : labkit_beta2demo : output
 ram1_clk : labkit_beta2demo : output
 ram1_data : labkit_beta2demo : inout
 ram1_oe_b : labkit_beta2demo : output
 ram1_we_b : labkit_beta2demo : output
 ramout : labkit_beta2demo : wire
Connects down to:lab9:mem:dout 
 rc_save : beta2 : reg
 rd1 : beta2 : wire
 rd2 : beta2 : wire
 rd_ps2 : labkit_beta2demo : reg
Connects down to:ps2:kbd:fifo_rd 
 regfile : beta2 : reg
 reset : beta2 : input
Connects down to:decode:ctl:reset 
Connects up to:labkit_beta2demo:cpu:reset 
 reset : decode : input
Connects up to:beta2:ctl:reset 
 reset : display_16hex : input
Connects up to:labkit_beta2demo:hexdisp1:reset 
 reset : labkit_beta2demo : wire
Connects down to:beta2:cpu:reset , ps2:kbd:reset , display_16hex:hexdisp1:reset 
 reset : ps2 : input
Connects up to:labkit_beta2demo:kbd:reset 
 reset_count : display_16hex : reg
 reset_in : simulate : reg
Connects down to:beta2demo:uut:reset_in 
 reverse : vga : reg
 rgb : labkit_beta2demo : wire
Connects down to:vga:dpy:rgb 
 rgb : simulate : wire
Connects down to:beta2demo:uut:rgb 
 rgb : vga : output reg
Connects up to:labkit_beta2demo:dpy:rgb 
 row : vga : reg
 row : xfont : output
Connects down to:RAMB16_S9:font:DO 
Connects up to:vga:f:font_byte 
 rptr : ps2 : reg
 rs232_cts : labkit_beta2demo : input
 rs232_rts : labkit_beta2demo : output
 rs232_rxd : labkit_beta2demo : input
 rs232_txd : labkit_beta2demo : output
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