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Signals index

S
 sample : ps2 : wire
 segments : segdisplay : output reg
 segments : simulate : wire
Connects down to:beta2demo:uut:segments 
 sel_60Hz : labkit_beta2demo : wire
Connects down to:vga:dpy:irq_clear 
 sel_dpy : labkit_beta2demo : wire
Connects down to:vga:dpy:mwe 
 sel_ps2 : labkit_beta2demo : wire
 sel_ram : labkit_beta2demo : wire
Connects down to:lab9:mem:we 
 shift : beta2 : wire
 shift : ps2 : reg
 shift_op : beta2 : wire
Connects down to:decode:ctl:shift_op 
 shift_op : decode : output reg
Connects up to:beta2:ctl:shift_op 
 shift_right : beta2 : wire
Connects down to:shift_right:sr:shift_right 
 shift_right : shift_right : output
Connects up to:beta2:sr:shift_right 
 shift_sxt : beta2 : wire
Connects down to:decode:ctl:shift_sxt , shift_right:sr:sxt 
 shift_sxt : decode : output reg
Connects up to:beta2:ctl:shift_sxt 
 sin : shift_right : wire
 state : display_16hex : reg
 switch : labkit_beta2demo : input
 sxt : shift_right : input
Connects up to:beta2:sr:shift_sxt 
 systemace_address : labkit_beta2demo : output
 systemace_ce_b : labkit_beta2demo : output
 systemace_data : labkit_beta2demo : inout
 systemace_irq : labkit_beta2demo : input
 systemace_mpbrdy : labkit_beta2demo : input
 systemace_oe_b : labkit_beta2demo : output
 systemace_we_b : labkit_beta2demo : output
T
 tick : segdisplay : output wire
 timeout : ps2 : reg
 trap : beta2 : wire
Connects down to:decode:ctl:trap 
 trap : decode : output reg
Connects up to:beta2:ctl:trap 
 tv_in_aef : labkit_beta2demo : input
 tv_in_aff : labkit_beta2demo : input
 tv_in_clock : labkit_beta2demo : output
 tv_in_data_valid : labkit_beta2demo : input
 tv_in_fifo_clock : labkit_beta2demo : output
 tv_in_fifo_read : labkit_beta2demo : output
 tv_in_hff : labkit_beta2demo : input
 tv_in_i2c_clock : labkit_beta2demo : output
 tv_in_i2c_data : labkit_beta2demo : inout
 tv_in_iso : labkit_beta2demo : output
 tv_in_line_clock1 : labkit_beta2demo : input
 tv_in_line_clock2 : labkit_beta2demo : input
 tv_in_reset_b : labkit_beta2demo : output
 tv_in_ycrcb : labkit_beta2demo : input
 tv_out_blank_b : labkit_beta2demo : output
 tv_out_clock : labkit_beta2demo : output
 tv_out_hsync_b : labkit_beta2demo : output
 tv_out_i2c_clock : labkit_beta2demo : output
 tv_out_i2c_data : labkit_beta2demo : output
 tv_out_pal_ntsc : labkit_beta2demo : output
 tv_out_reset_b : labkit_beta2demo : output
 tv_out_subcar_reset : labkit_beta2demo : output
 tv_out_vsync_b : labkit_beta2demo : output
 tv_out_ycrcb : labkit_beta2demo : output
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