Description

Lab and Coral Name	TRL / rta35
Model	AG Associates Heatpulse 410
Specialist	Bernard Alamariu (Eric Lim)
Physical Location	4F Main-South

Classifications

Process Category	Diffusion
Subcategory	Bake
Material Keywords	Silicon, III-V, GaN, CMOS Metals, Non-CMOS Metals
Sample Size	6" Wafers, 4" Wafers, Pieces
Alternative	rta-pieces
Keywords	single wafer, manual load, multiple pieces, top side of sample, vacuum, temperature

The rta35 is a rapid thermal annealer for III-V materials. Temperature in the chamber is measured using thermocouple. Single or multiple small pieces can be annealed at a time. The annealing is done under N2 ambient.

Best for	Alloying Ohmics, Annealing dieletrics (Si3N4, SiO2…)
Limitations	Small pieces
Characteristics/FOM	Flash based annealing oven with controlled and stable chamber temperature
Caution with	PR and any polymer is not strictly prohibited
Machine Charges	4/wafer

Documents

Emergency Guide

MTL Emergency Preparedness Guide, Summary of emergency procedures contacts and numbers

Process Matrix Details

Permitted
Been in the ALD, III-V Substrates, Germanium on surface (A), Germanium buried, Pieces, Gold or RED color code (Adds), Any exposure to CMOS metal (Adds), CMOS metal on surface, CMOS metal buried, Been in the STS DRIE, Been in the SEM (With Appropriate Chuck), Been in the Concept1, Coming from KOH, Coming from CMP

Not Allowed
Ever been in EML, Pyrex Substrates, Has Photoresist, Has Polyimide, Has Cured SU8

For more details or help, please consult PTC matrix, email ptc@mtl.mit.edu, or ask the research specialist (Bernard Alamariu)

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TRL / rta35: Rapid Thermal Annealing