Equipment
Lab and Coral NameICL / 6C-LTO
ModelThermco 10K
SpecialistBernard Alamariu    (Eric Lim)
Physical Location2F 4-North Diffusion
Classification
Process CategoryDiffusion
SubcategoryCVD
Material KeywordsSiO2
Sample Size6" Wafers, 4" Wafers
Alternativenone
Keywordsmulti wafer, manual load, multiple pieces, both sides of sample, conformal dep, temperature, manual operation
Description
The 6C-LTO is a low pressure diffusion tube that LPCVD Low Temperature Oxide. Deposition typically occurs at 400C and the tool is capable of depositing thin films conformally (i.e. this tool can be used to conformally fill trenches). This tool should be used to deposit oxide thicknesses 1 um and less. This tool allows high-k, and MEMS processes as well as regular CMOS processes.

Best for
Limitations
Characteristics/FOM
Caution with
Machine Charges65/run + 70/um
Documents

SOP
Tube 6CSOP for the tube 6C
Process Matrix Details

Permitted
Been in the ALDSamples that have been in any of the ALD systems
,
Germanium on surfaceSamples with germanium on the surface (typically grown films)
,
Germanium buriedSamples with germanium buried below a different film
,
Been in the STS DRIEThe DRIE etch leaves behind polymer residues on the sidewall ripples, which can be a contamination concern for some tools.
(With Appropriate Chuck),
Been in the SEMA sample viewed in the SEM must have used the appropriate chuck to avoid cross-contamination
(With Appropriate Chuck),
Coming from KOHAfter a KOH etch, the samples must receive a special clean because the K ions are highly contaminating to CMOS frontend tools
,
Coming from CMPAfter a CMP, the samples must receive a special clean, because the slurry residues otherwise introduce contamination and particles.
,
Requires ICL RCA CleanAn RCA clean in ICL was carried out immediately before
(Must do)

Not Allowed
Ever been in EMLSamples from EML are never permitted to return to ICL or TRL
,
Pyrex SubstratesPyrex substrates can be a concern due to high sodium content, which contaminates CMOS frontend tools
,
III-V SubstratesAny III-V substrates, e.g. GaAs, GaN, InP, and so on. Note though that many common III-V substrates will also carry the Au flag, but there are some GREEN III-V substrates.
,
PiecesWafer pieces may not be handled by the equipment, and are harder to thoroughly clean - preventing them from running in certain tools.
,
Gold or RED color codeRED color code substrates. These are gold-contaminated or have been processed in gold contaminated tools. Gold and other metals can contaminate silicon devices (GREEN color code) and have to be separated.
,
Any exposure to CMOS metalIf the sample had ever seen a CMOS metal (or a tool that accepts CMOS metal), then some frontend tools could be contaminated by this.
,
CMOS metal on surfaceCMOS compatible metals exposed on the surface. These are Al,Ni,Pt,Ti,TiN. Other metals such as Au are *NOT* part of this.
,
CMOS metal buriedCMOS compatible metals covered entirely by a different material. These are Al,Ni,Pt,Ti,TiN. Other metals such as Au are *NOT* part of this.
,
Been in the Concept1The Concep1 deposits dielectrics on GREEN wafers, however it also accepts metal and there can be cross-contamination for diffusion area
,
Has PhotoresistSamples with photoresist cannot be exposed to high temperatures, which is typical in deposition tools. Outgassing can be a concern.
,
Has PolyimidePolyimide is a very chemically resistant polymer, and can tolerate higher temperatures but cannot be exposed to typical PECVD deposition temperatures or diffusion furnaces. Outgassing can be a concern.
,
Has Cured SU8Not fully cured SU8 residues can heavily contaminated plasma chambers or destroy other user's samples, but fully cured SU8 is permitted in certain tools.
,
Has been past RCA clean for over 4 hoursFor some diffusion furnaces, the samples must immideatly enter the furnace and cannot be stored in a box for a long time.


For more details or help, please consult PTC matrix, email ptc@mtl.mit.edu, or ask the research specialist (Bernard Alamariu)