Equipment
Lab and Coral NameTRL / FLX
ModelKLA-Tencor FLX
SpecialistDennis Ward     (Bernard Alamariu)
Physical Location4F Main-North
Classification
Process CategoryMetrology
SubcategoryProfile
Material KeywordsNone
Sample Size6" Wafers, 4" Wafers
AlternativeNone
Keywordssingle wafer, manual load, both sides of sample, temperature, manual operation, alignment, requires flat
Description
The FLX is an optical profilerometer that measures the curvature of a wafer, and calculates thin film stress from it. This is accomplished by scanning a laser across the wafer, fitting a radius of curvature to the data, and calculating the film stress based on Stoney's formula. The tool can also apply different substrate temperatures, and measure how warped a wafer is. Typically, a measurement is taken on a wafer prior to thin film deposition as a reference, and then again afterwards to calculate the change in radius of curvature and therefore the deposited film's stress.

Best forMeasuring stress for deposited films on dummy wafers, optimizing film stacks for zero-stress
LimitationsThe analysis may not be applicable for patterned wafers, certain SOI wafers, or when where the stress varies greatly across the wafer
Characteristics/FOMsingle wafer
Caution withChuck is hot when measuring at elevated temperatures.
Machine Charges5/hour
Documents

Documents
StressBackground on thin film stress calculations
Process Matrix Details

Permitted
Been in the ALDSamples that have been in any of the ALD systems
,
Pyrex SubstratesPyrex substrates can be a concern due to high sodium content, which contaminates CMOS frontend tools
,
III-V SubstratesAny III-V substrates, e.g. GaAs, GaN, InP, and so on. Note though that many common III-V substrates will also carry the Au flag, but there are some GREEN III-V substrates.
,
Germanium on surfaceSamples with germanium on the surface (typically grown films)
,
Germanium buriedSamples with germanium buried below a different film
,
PiecesWafer pieces may not be handled by the equipment, and are harder to thoroughly clean - preventing them from running in certain tools.
,
Gold or RED color codeRED color code substrates. These are gold-contaminated or have been processed in gold contaminated tools. Gold and other metals can contaminate silicon devices (GREEN color code) and have to be separated.
,
Any exposure to CMOS metalIf the sample had ever seen a CMOS metal (or a tool that accepts CMOS metal), then some frontend tools could be contaminated by this.
,
CMOS metal on surfaceCMOS compatible metals exposed on the surface. These are Al,Ni,Pt,Ti,TiN. Other metals such as Au are *NOT* part of this.
,
CMOS metal buriedCMOS compatible metals covered entirely by a different material. These are Al,Ni,Pt,Ti,TiN. Other metals such as Au are *NOT* part of this.
,
Been in the STS DRIEThe DRIE etch leaves behind polymer residues on the sidewall ripples, which can be a contamination concern for some tools.
,
Been in the SEMA sample viewed in the SEM must have used the appropriate chuck to avoid cross-contamination
,
Been in the Concept1The Concep1 deposits dielectrics on GREEN wafers, however it also accepts metal and there can be cross-contamination for diffusion area
,
Has PhotoresistSamples with photoresist cannot be exposed to high temperatures, which is typical in deposition tools. Outgassing can be a concern.
,
Has PolyimidePolyimide is a very chemically resistant polymer, and can tolerate higher temperatures but cannot be exposed to typical PECVD deposition temperatures or diffusion furnaces. Outgassing can be a concern.
,
Has Cured SU8Not fully cured SU8 residues can heavily contaminated plasma chambers or destroy other user's samples, but fully cured SU8 is permitted in certain tools.
,
Coming from KOHAfter a KOH etch, the samples must receive a special clean because the K ions are highly contaminating to CMOS frontend tools
,
Coming from CMPAfter a CMP, the samples must receive a special clean, because the slurry residues otherwise introduce contamination and particles.


Not Allowed
Ever been in EMLSamples from EML are never permitted to return to ICL or TRL


For more details or help, please consult PTC matrix, email ptc@mtl.mit.edu, or ask the research specialist (Dennis Ward )